Loading asoc/codecs/bolero/bolero-cdc.c +6 −0 Original line number Diff line number Diff line Loading @@ -208,6 +208,12 @@ static int bolero_cdc_update_wcd_event(void *handle, u16 event, u32 data) priv->component, BOLERO_MACRO_EVT_IMPED_FALSE, data); break; case WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST: if (priv->macro_params[RX_MACRO].event_handler) priv->macro_params[RX_MACRO].event_handler( priv->component, BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST, data); break; default: dev_err(priv->dev, "%s: Invalid event %d trigger from wcd\n", __func__, event); Loading asoc/codecs/bolero/bolero-cdc.h +2 −1 Original line number Diff line number Diff line Loading @@ -39,7 +39,8 @@ enum { BOLERO_MACRO_EVT_SSR_UP, BOLERO_MACRO_EVT_WAIT_VA_CLK_RESET, BOLERO_MACRO_EVT_CLK_RESET, BOLERO_MACRO_EVT_REG_WAKE_IRQ BOLERO_MACRO_EVT_REG_WAKE_IRQ, BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST }; struct macro_ops { Loading asoc/codecs/bolero/internal.h +1 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ enum { WCD_BOLERO_EVT_RX_MUTE = 1, /* for RX mute/unmute */ WCD_BOLERO_EVT_IMPED_TRUE, /* for imped true */ WCD_BOLERO_EVT_IMPED_FALSE, /* for imped false */ WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST, }; struct wcd_ctrl_platform_data { Loading asoc/codecs/bolero/rx-macro.c +15 −0 Original line number Diff line number Diff line Loading @@ -1208,6 +1208,17 @@ static int rx_macro_event_handler(struct snd_soc_component *component, snd_soc_component_update_bits(component, reg_mix, 0x10, val); break; case BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST: rx_idx = data >> 0x10; if (rx_idx == INTERP_AUX) goto done; reg = BOLERO_CDC_RX_COMPANDER0_CTL0 + (rx_idx * RX_MACRO_COMP_OFFSET); snd_soc_component_update_bits(component, reg, 0x20, 0x20); snd_soc_component_update_bits(component, reg, 0x20, 0x00); break; case BOLERO_MACRO_EVT_IMPED_TRUE: rx_macro_wcd_clsh_imped_config(component, data, true); break; Loading Loading @@ -1251,6 +1262,7 @@ static int rx_macro_event_handler(struct snd_soc_component *component, bolero_rsc_clk_reset(rx_dev, RX_CORE_CLK); break; } done: return ret; } Loading Loading @@ -2248,6 +2260,9 @@ static int rx_macro_enable_interp_clk(struct snd_soc_component *component, rx_priv->main_clk_users[interp_idx]--; if (rx_priv->main_clk_users[interp_idx] <= 0) { rx_priv->main_clk_users[interp_idx] = 0; /* Main path PGA mute enable */ snd_soc_component_update_bits(component, main_reg, 0x10, 0x10); /* Clk Disable */ snd_soc_component_update_bits(component, dsm_reg, 0x01, 0x00); Loading Loading
asoc/codecs/bolero/bolero-cdc.c +6 −0 Original line number Diff line number Diff line Loading @@ -208,6 +208,12 @@ static int bolero_cdc_update_wcd_event(void *handle, u16 event, u32 data) priv->component, BOLERO_MACRO_EVT_IMPED_FALSE, data); break; case WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST: if (priv->macro_params[RX_MACRO].event_handler) priv->macro_params[RX_MACRO].event_handler( priv->component, BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST, data); break; default: dev_err(priv->dev, "%s: Invalid event %d trigger from wcd\n", __func__, event); Loading
asoc/codecs/bolero/bolero-cdc.h +2 −1 Original line number Diff line number Diff line Loading @@ -39,7 +39,8 @@ enum { BOLERO_MACRO_EVT_SSR_UP, BOLERO_MACRO_EVT_WAIT_VA_CLK_RESET, BOLERO_MACRO_EVT_CLK_RESET, BOLERO_MACRO_EVT_REG_WAKE_IRQ BOLERO_MACRO_EVT_REG_WAKE_IRQ, BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST }; struct macro_ops { Loading
asoc/codecs/bolero/internal.h +1 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ enum { WCD_BOLERO_EVT_RX_MUTE = 1, /* for RX mute/unmute */ WCD_BOLERO_EVT_IMPED_TRUE, /* for imped true */ WCD_BOLERO_EVT_IMPED_FALSE, /* for imped false */ WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST, }; struct wcd_ctrl_platform_data { Loading
asoc/codecs/bolero/rx-macro.c +15 −0 Original line number Diff line number Diff line Loading @@ -1208,6 +1208,17 @@ static int rx_macro_event_handler(struct snd_soc_component *component, snd_soc_component_update_bits(component, reg_mix, 0x10, val); break; case BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST: rx_idx = data >> 0x10; if (rx_idx == INTERP_AUX) goto done; reg = BOLERO_CDC_RX_COMPANDER0_CTL0 + (rx_idx * RX_MACRO_COMP_OFFSET); snd_soc_component_update_bits(component, reg, 0x20, 0x20); snd_soc_component_update_bits(component, reg, 0x20, 0x00); break; case BOLERO_MACRO_EVT_IMPED_TRUE: rx_macro_wcd_clsh_imped_config(component, data, true); break; Loading Loading @@ -1251,6 +1262,7 @@ static int rx_macro_event_handler(struct snd_soc_component *component, bolero_rsc_clk_reset(rx_dev, RX_CORE_CLK); break; } done: return ret; } Loading Loading @@ -2248,6 +2260,9 @@ static int rx_macro_enable_interp_clk(struct snd_soc_component *component, rx_priv->main_clk_users[interp_idx]--; if (rx_priv->main_clk_users[interp_idx] <= 0) { rx_priv->main_clk_users[interp_idx] = 0; /* Main path PGA mute enable */ snd_soc_component_update_bits(component, main_reg, 0x10, 0x10); /* Clk Disable */ snd_soc_component_update_bits(component, dsm_reg, 0x01, 0x00); Loading