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Commit 9d854607 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull second set of arm64 updates from Catalin Marinas:

 - KASLR bug fixes: use callee-saved register, boot-time I-cache
   maintenance

 - inv_entry asm macro fix (EL0 check typo)

 - pr_notice("Virtual kernel memory layout...") splitting

 - Clean-ups: use p?d_set_huge consistently, allow preemption around
   copy_to_user_page, remove unused __local_flush_icache_all()

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: mm: allow preemption in copy_to_user_page
  arm64: consistently use p?d_set_huge
  arm64: kaslr: use callee saved register to preserve SCTLR across C call
  arm64: Split pr_notice("Virtual kernel memory layout...") into multiple pr_cont()
  arm64: drop unused __local_flush_icache_all()
  arm64: fix KASLR boot-time I-cache maintenance
  arm64/kernel: fix incorrect EL0 check in inv_entry macro
parents 8a20a04b 691b1e2e

arch/arm64/include/asm/cacheflush.h

+0 −7
Original line number Diff line number Diff line
@@ -116,13 +116,6 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, 
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1

extern void flush_dcache_page(struct page *);



static inline void __local_flush_icache_all(void)

{

	asm("ic iallu");

	dsb(nsh);

	isb();

}



static inline void __flush_icache_all(void)

{

	asm("ic	ialluis");

arch/arm64/kernel/entry.S

+1 −1
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ END(vectors) 
 * Invalid mode handlers

 */

	.macro	inv_entry, el, reason, regsize = 64

	kernel_entry el, \regsize

	kernel_entry \el, \regsize

	mov	x0, sp

	mov	x1, #\reason

	mrs	x2, esr_el1

arch/arm64/kernel/head.S

+5 −4
Original line number Diff line number Diff line
@@ -758,7 +758,7 @@ ENTRY(__early_cpu_boot_status) 
 */

	.section	".idmap.text", "ax"

__enable_mmu:

	mrs	x18, sctlr_el1			// preserve old SCTLR_EL1 value

	mrs	x22, sctlr_el1			// preserve old SCTLR_EL1 value

	mrs	x1, ID_AA64MMFR0_EL1

	ubfx	x2, x1, #ID_AA64MMFR0_TGRAN_SHIFT, 4

	cmp	x2, #ID_AA64MMFR0_TGRAN_SUPPORTED
@@ -786,14 +786,15 @@ __enable_mmu: 
	 * to take into account by discarding the current kernel mapping and

	 * creating a new one.

	 */

	msr	sctlr_el1, x18			// disable the MMU

	msr	sctlr_el1, x22			// disable the MMU

	isb

	bl	__create_page_tables		// recreate kernel mapping



	msr	sctlr_el1, x19			// re-enable the MMU

	isb

	ic	ialluis				// flush instructions fetched

	isb					// via old mapping

	ic	iallu				// flush instructions fetched

	dsb	nsh				// via old mapping

	isb

	add	x27, x27, x23			// relocated __mmap_switched

#endif

	br	x27

arch/arm64/mm/flush.c

+0 −4
Original line number Diff line number Diff line
@@ -58,17 +58,13 @@ static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 
 * Copy user data from/to a page which is mapped into a different processes

 * address space.  Really, we want to allow our "user space" model to handle

 * this.

 *

 * Note that this code needs to run on the current CPU.

 */

void copy_to_user_page(struct vm_area_struct *vma, struct page *page,

		       unsigned long uaddr, void *dst, const void *src,

		       unsigned long len)

{

	preempt_disable();

	memcpy(dst, src, len);

	flush_ptrace_access(vma, page, uaddr, dst, len);

	preempt_enable();

}



void __sync_icache_dcache(pte_t pte, unsigned long addr)

arch/arm64/mm/init.c

+28 −32
Original line number Diff line number Diff line
@@ -362,40 +362,36 @@ void __init mem_init(void) 
#define MLG(b, t) b, t, ((t) - (b)) >> 30

#define MLK_ROUNDUP(b, t) b, t, DIV_ROUND_UP(((t) - (b)), SZ_1K)



	pr_notice("Virtual kernel memory layout:\n"

	pr_notice("Virtual kernel memory layout:\n");

#ifdef CONFIG_KASAN

		  "    kasan   : 0x%16lx - 0x%16lx   (%6ld GB)\n"

	pr_cont("    kasan   : 0x%16lx - 0x%16lx   (%6ld GB)\n",

		MLG(KASAN_SHADOW_START, KASAN_SHADOW_END));

#endif

		  "    modules : 0x%16lx - 0x%16lx   (%6ld MB)\n"

		  "    vmalloc : 0x%16lx - 0x%16lx   (%6ld GB)\n"

		  "      .text : 0x%p" " - 0x%p" "   (%6ld KB)\n"

	pr_cont("    modules : 0x%16lx - 0x%16lx   (%6ld MB)\n",

		MLM(MODULES_VADDR, MODULES_END));

	pr_cont("    vmalloc : 0x%16lx - 0x%16lx   (%6ld GB)\n",

		MLG(VMALLOC_START, VMALLOC_END));

	pr_cont("      .text : 0x%p" " - 0x%p" "   (%6ld KB)\n"

		"    .rodata : 0x%p" " - 0x%p" "   (%6ld KB)\n"

		"      .init : 0x%p" " - 0x%p" "   (%6ld KB)\n"

		  "      .data : 0x%p" " - 0x%p" "   (%6ld KB)\n"

#ifdef CONFIG_SPARSEMEM_VMEMMAP

		  "    vmemmap : 0x%16lx - 0x%16lx   (%6ld GB maximum)\n"

		  "              0x%16lx - 0x%16lx   (%6ld MB actual)\n"

#endif

		  "    fixed   : 0x%16lx - 0x%16lx   (%6ld KB)\n"

		  "    PCI I/O : 0x%16lx - 0x%16lx   (%6ld MB)\n"

		  "    memory  : 0x%16lx - 0x%16lx   (%6ld MB)\n",

#ifdef CONFIG_KASAN

		  MLG(KASAN_SHADOW_START, KASAN_SHADOW_END),

#endif

		  MLM(MODULES_VADDR, MODULES_END),

		  MLG(VMALLOC_START, VMALLOC_END),

		"      .data : 0x%p" " - 0x%p" "   (%6ld KB)\n",

		MLK_ROUNDUP(_text, __start_rodata),

		MLK_ROUNDUP(__start_rodata, _etext),

		MLK_ROUNDUP(__init_begin, __init_end),

		  MLK_ROUNDUP(_sdata, _edata),

		MLK_ROUNDUP(_sdata, _edata));

#ifdef CONFIG_SPARSEMEM_VMEMMAP

	pr_cont("    vmemmap : 0x%16lx - 0x%16lx   (%6ld GB maximum)\n"

		"              0x%16lx - 0x%16lx   (%6ld MB actual)\n",

		MLG(VMEMMAP_START,

		    VMEMMAP_START + VMEMMAP_SIZE),

		MLM((unsigned long)phys_to_page(memblock_start_of_DRAM()),

		      (unsigned long)virt_to_page(high_memory)),

		    (unsigned long)virt_to_page(high_memory)));

#endif

		  MLK(FIXADDR_START, FIXADDR_TOP),

		  MLM(PCI_IO_START, PCI_IO_END),

	pr_cont("    fixed   : 0x%16lx - 0x%16lx   (%6ld KB)\n",

		MLK(FIXADDR_START, FIXADDR_TOP));

	pr_cont("    PCI I/O : 0x%16lx - 0x%16lx   (%6ld MB)\n",

		MLM(PCI_IO_START, PCI_IO_END));

	pr_cont("    memory  : 0x%16lx - 0x%16lx   (%6ld MB)\n",

		MLM(__phys_to_virt(memblock_start_of_DRAM()),

		    (unsigned long)high_memory));