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Commit 9d84145a authored by Ravikishore Pampana's avatar Ravikishore Pampana
Browse files

msm: camera: tfe: tfe debug enhancement



If any tfe error comes read each CLC Hardware status and log it.
Move the tfe bus error processing to the bus file.
Log the bus overflow client name if bus overflow comes.
Log the bus client name if image violation comes.

CRs-Fixed: 2585713
Change-Id: I1fceb45d58267d5f2f650841dd6dd95fcb6a6f2b
Signed-off-by: default avatarRavikishore Pampana <rpampana@codeaurora.org>
parent 261d4002
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+78 −0
Original line number Diff line number Diff line
@@ -66,6 +66,7 @@ static struct cam_tfe_camif_reg_data tfe530_camif_reg_data = {
	.extern_reg_update_shift      = 0x0,
	.camif_pd_rdi2_src_sel_shift  = 0x2,
	.dual_tfe_sync_sel_shift      = 18,
	.delay_line_en_shift          = 8,
	.pixel_pattern_shift          = 24,
	.pixel_pattern_mask           = 0x7000000,
	.module_enable_shift          = 0,
@@ -202,6 +203,65 @@ static struct cam_tfe_rdi_reg_data tfe530_rdi2_reg_data = {
	.enable_diagnostic_hw        = 0x1,
};

static struct cam_tfe_clc_hw_status  tfe530_clc_hw_info[CAM_TFE_MAX_CLC] = {
	{
		.name = "CLC_CAMIF",
		.hw_status_reg = 0x1204,
	},
	{
		.name = "CLC_RDI0_CAMIF",
		.hw_status_reg = 0x1404,
	},
	{
		.name = "CLC_RDI1_CAMIF",
		.hw_status_reg = 0x1604,
	},
	{
		.name = "CLC_RDI2_CAMIF",
		.hw_status_reg = 0x1804,
	},
	{
		.name = "CLC_CHANNEL_GAIN",
		.hw_status_reg = 0x2604,
	},
	{
		.name = "CLC_LENS_ROLL_OFF",
		.hw_status_reg = 0x2804,
	},
	{
		.name = "CLC_WB_BDS",
		.hw_status_reg = 0x2A04,
	},
	{
		.name = "CLC_STATS_BHIST",
		.hw_status_reg = 0x2C04,
	},
	{
		.name = "CLC_STATS_TINTLESS_BG",
		.hw_status_reg = 0x2E04,
	},
	{
		.name = "CLC_STATS_BAF",
		.hw_status_reg = 0x3004,
	},
	{
		.name = "CLC_STATS_AWB_BG",
		.hw_status_reg = 0x3204,
	},
	{
		.name = "CLC_STATS_AEC_BG",
		.hw_status_reg = 0x3404,
	},
	{
		.name = "CLC_STATS_RAW_OUT",
		.hw_status_reg = 0x3604,
	},
	{
		.name = "CLC_STATS_CROP_POST_BDS",
		.hw_status_reg = 0x3804,
	},
};

static struct  cam_tfe_top_hw_info tfe530_top_hw_info = {
	.common_reg = &tfe530_top_commong_reg,
	.camif_hw_info = {
@@ -385,6 +445,9 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			0x00001A2C,
		},
		.irq_cmd = 0x00001A30,
		.cons_violation_shift = 28,
		.violation_shift  = 30,
		.image_size_violation = 31,
	},
	.num_client = CAM_TFE_BUS_MAX_CLIENTS,
	.bus_client_reg = {
@@ -414,6 +477,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x00001C7C,
			.debug_status_1        = 0x00001C80,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_0,
			.client_name           = "BAYER",
		},
		/* BUS Client 1 IDEAL RAW*/
		{
@@ -441,6 +505,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x00001D7C,
			.debug_status_1        = 0x00001D80,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_1,
			.client_name           = "IDEAL_RAW",
		},
		/* BUS Client 2 Stats BE Tintless */
		{
@@ -468,6 +533,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x00001E7C,
			.debug_status_1        = 0x00001E80,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_2,
			.client_name           = "STATS BE TINTLESS",
		},
		/* BUS Client 3 Stats Bhist */
		{
@@ -495,6 +561,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x00001F7C,
			.debug_status_1        = 0x00001F80,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_2,
			.client_name           = "STATS BHIST",
		},
		/* BUS Client 4 Stats AWB BG */
		{
@@ -522,6 +589,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000207C,
			.debug_status_1        = 0x00002080,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_3,
			.client_name           = "STATS AWB BG",
		},
		/* BUS Client 5 Stats AEC BG */
		{
@@ -549,6 +617,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000217C,
			.debug_status_1        = 0x00002180,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_3,
			.client_name           = "STATS AEC BG",
		},
		/* BUS Client 6 Stats BAF */
		{
@@ -576,6 +645,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000227C,
			.debug_status_1        = 0x00002280,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_4,
			.client_name           = "STATS BAF",
		},
		/* BUS Client 7 RDI0 */
		{
@@ -603,6 +673,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000237C,
			.debug_status_1        = 0x00002380,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_5,
			.client_name           = "RDI0",
		},
		/* BUS Client 8 RDI1 */
		{
@@ -630,6 +701,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000247C,
			.debug_status_1        = 0x00002480,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_6,
			.client_name           = "RDI1",
		},
		/* BUS Client 9 PDAF/RDI2*/
		{
@@ -657,6 +729,7 @@ static struct cam_tfe_bus_hw_info tfe530_bus_hw_info = {
			.debug_status_0        = 0x0000257C,
			.debug_status_1        = 0x00002580,
			.comp_group            = CAM_TFE_BUS_COMP_GRP_7,
			.client_name           = "RDI2/PADF",
		},
	},
	.num_out  = CAM_TFE_BUS_TFE_OUT_MAX,
@@ -800,9 +873,14 @@ struct cam_tfe_hw_info cam_tfe530 = {
	.bus_reg_irq_mask = {
		0x00000002,
		0x00000000,
	},
	.bus_error_irq_mask = {
		0xC0000000,
		0x00000000,
	},

	.num_clc = 14,
	.clc_hw_status_info            = tfe530_clc_hw_info,
	.bus_version                   = CAM_TFE_BUS_1_0,
	.bus_hw_info                   = &tfe530_bus_hw_info,

+121 −1
Original line number Diff line number Diff line
@@ -95,6 +95,10 @@ struct cam_tfe_bus_wm_resource_data {

	uint32_t             en_cfg;
	uint32_t             is_dual;

	uint32_t             acquired_width;
	uint32_t             acquired_height;
	uint32_t             acquired_stride;
};

struct cam_tfe_bus_comp_grp_data {
@@ -491,6 +495,15 @@ static int cam_tfe_bus_acquire_wm(
	rsrc_data->width = out_port_info->width;
	rsrc_data->height = out_port_info->height;
	rsrc_data->stride = out_port_info->stride;

	/*
	 * Store the acquire width, height separately. For frame based ports
	 * width and height modified again
	 */
	rsrc_data->acquired_width = out_port_info->width;
	rsrc_data->acquired_height = out_port_info->height;
	rsrc_data->acquired_stride = out_port_info->stride;

	rsrc_data->is_dual = is_dual;
	/* Set WM offset value to default */
	rsrc_data->offset  = 0;
@@ -1573,8 +1586,108 @@ static int cam_tfe_bus_bufdone_bottom_half(
	return 0;
}

static void cam_tfe_bus_error_bottom_half(
	struct cam_tfe_bus_priv            *bus_priv,
	struct cam_tfe_irq_evt_payload     *evt_payload)
{
	struct cam_tfe_bus_wm_resource_data   *rsrc_data;
	struct cam_tfe_bus_reg_offset_common  *common_reg;
	uint32_t i, overflow_status, image_size_violation_status;
	uint32_t ccif_violation_status;

	common_reg = bus_priv->common_data.common_reg;

	CAM_INFO(CAM_ISP, "BUS IRQ[0]:0x%x BUS IRQ[1]:0x%x",
		evt_payload->bus_irq_val[0], evt_payload->bus_irq_val[1]);

	overflow_status = cam_io_r_mb(bus_priv->common_data.mem_base +
		bus_priv->common_data.common_reg->overflow_status);

	image_size_violation_status  = cam_io_r_mb(
		bus_priv->common_data.mem_base +
		bus_priv->common_data.common_reg->image_size_violation_status);

	ccif_violation_status = cam_io_r_mb(bus_priv->common_data.mem_base +
		bus_priv->common_data.common_reg->ccif_violation_status);

	CAM_INFO(CAM_ISP,
		"ccif violation status:0x%x image size violation:0x%x overflow status:0x%x",
		ccif_violation_status,
		image_size_violation_status,
		overflow_status);

	/* Check the bus errors */
	if (evt_payload->bus_irq_val[0] & BIT(common_reg->cons_violation_shift))
		CAM_INFO(CAM_ISP, "CONS_VIOLATION");

	if (evt_payload->bus_irq_val[0] & BIT(common_reg->violation_shift))
		CAM_INFO(CAM_ISP, "VIOLATION");

	if (evt_payload->bus_irq_val[0] &
		BIT(common_reg->image_size_violation)) {
		CAM_INFO(CAM_ISP, "IMAGE_SIZE_VIOLATION val :0x%x",
			evt_payload->image_size_violation_status);

		for (i = 0; i < CAM_TFE_BUS_MAX_CLIENTS; i++) {
			if (!(evt_payload->image_size_violation_status >> i))
				break;

			if (evt_payload->image_size_violation_status & BIT(i)) {
				rsrc_data = bus_priv->bus_client[i].res_priv;
				CAM_INFO(CAM_ISP,
					"WM:%d width 0x%x height:0x%x format:%d stride:0x%x offset:0x%x encfg:0x%x",
					i,
					rsrc_data->acquired_width,
					rsrc_data->acquired_height,
					rsrc_data->format,
					rsrc_data->acquired_stride,
					rsrc_data->offset,
					rsrc_data->en_cfg);

			CAM_INFO(CAM_ISP,
				"WM:%d current width 0x%x height:0x%x stride:0x%x",
				i,
				rsrc_data->width,
				rsrc_data->height,
				rsrc_data->stride);

			}
		}
	}

	if (overflow_status) {
		for (i = 0; i < CAM_TFE_BUS_MAX_CLIENTS; i++) {

			if (!(evt_payload->overflow_status >> i))
				break;

			if (evt_payload->overflow_status & BIT(i)) {
				rsrc_data = bus_priv->bus_client[i].res_priv;
				CAM_INFO(CAM_ISP,
					"WM:%d %s BUS OVERFLOW width0x%x height:0x%x format:%d stride:0x%x offset:0x%x encfg:%x",
					i,
					rsrc_data->hw_regs->client_name,
					rsrc_data->acquired_width,
					rsrc_data->acquired_height,
					rsrc_data->format,
					rsrc_data->acquired_stride,
					rsrc_data->offset,
					rsrc_data->en_cfg);

				CAM_INFO(CAM_ISP,
					"WM:%d current width:0x%x height:0x%x stride:0x%x",
					i,
					rsrc_data->width,
					rsrc_data->height,
					rsrc_data->stride);
			}
		}
	}
}

static int cam_tfe_bus_bottom_half(void   *priv,
	bool rup_process, struct cam_tfe_irq_evt_payload   *evt_payload)
	bool rup_process, struct cam_tfe_irq_evt_payload   *evt_payload,
	bool error_process)
{
	struct cam_tfe_bus_priv          *bus_priv;
	uint32_t val;
@@ -1585,6 +1698,11 @@ static int cam_tfe_bus_bottom_half(void *priv,
	}
	bus_priv = (struct cam_tfe_bus_priv   *) priv;

	if (error_process) {
		cam_tfe_bus_error_bottom_half(bus_priv, evt_payload);
		goto end;
	}

	/* if bus errors are there, mask all bus errors */
	if (evt_payload->bus_irq_val[0] & bus_priv->bus_irq_error_mask[0]) {
		val = cam_io_r(bus_priv->common_data.mem_base +
@@ -1592,6 +1710,7 @@ static int cam_tfe_bus_bottom_half(void *priv,
		val &= ~bus_priv->bus_irq_error_mask[0];
		cam_io_w(val, bus_priv->common_data.mem_base +
			bus_priv->common_data.common_reg->irq_mask[0]);

	}

	if (rup_process) {
@@ -1604,6 +1723,7 @@ static int cam_tfe_bus_bottom_half(void *priv,
			cam_tfe_bus_bufdone_bottom_half(bus_priv, evt_payload);
	}

end:
	return 0;

}
+13 −5
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@
#define CAM_TFE_BUS_MAX_SUB_GRPS            4
#define CAM_TFE_BUS_MAX_PERF_CNT_REG        8
#define CAM_TFE_BUS_MAX_IRQ_REGISTERS       2
#define CAM_TFE_BUS_CLIENT_NAME_MAX_LENGTH 32

#define CAM_TFE_BUS_1_0             0x1000

@@ -29,7 +30,8 @@
	((value + alignment - 1) / alignment * alignment)

typedef int (*CAM_BUS_HANDLER_BOTTOM_HALF)(void      *bus_priv,
	bool rup_process, struct cam_tfe_irq_evt_payload   *evt_payload);
	bool rup_process, struct cam_tfe_irq_evt_payload   *evt_payload,
	bool error_process);

enum cam_tfe_bus_plane_type {
	PLANE_Y,
@@ -106,6 +108,10 @@ struct cam_tfe_bus_reg_offset_common {
	uint32_t irq_clear[CAM_TFE_BUS_IRQ_REGISTERS_MAX];
	uint32_t irq_status[CAM_TFE_BUS_IRQ_REGISTERS_MAX];
	uint32_t irq_cmd;
	/* common register data */
	uint32_t cons_violation_shift;
	uint32_t violation_shift;
	uint32_t image_size_violation;
};

/*
@@ -138,6 +144,8 @@ struct cam_tfe_bus_reg_offset_bus_client {
	uint32_t debug_status_0;
	uint32_t debug_status_1;
	uint32_t comp_group;
	/*bus data */
	uint8_t  client_name[CAM_TFE_BUS_CLIENT_NAME_MAX_LENGTH];
};

/*
+213 −95

File changed.

Preview size limit exceeded, changes collapsed.

+39 −26
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@
#define CAM_TFE_MAX_REG_DUMP_ENTRIES  20
#define CAM_TFE_MAX_LUT_DUMP_ENTRIES  10

#define CAM_TFE_MAX_CLC               30
#define CAM_TFE_CLC_NAME_LENGTH_MAX   32

enum cam_tfe_lut_word_size {
	CAM_TFE_LUT_WORD_SIZE_32,
	CAM_TFE_LUT_WORD_SIZE_64,
@@ -112,6 +115,7 @@ struct cam_tfe_camif_reg_data {
	uint32_t     extern_reg_update_shift;
	uint32_t     camif_pd_rdi2_src_sel_shift;
	uint32_t     dual_tfe_sync_sel_shift;
	uint32_t     delay_line_en_shift;

	uint32_t     pixel_pattern_shift;
	uint32_t     pixel_pattern_mask;
@@ -180,6 +184,11 @@ struct cam_tfe_rdi_reg_data {
	uint32_t     enable_diagnostic_hw;
};

struct cam_tfe_clc_hw_status {
	uint8_t     name[CAM_TFE_CLC_NAME_LENGTH_MAX];
	uint32_t    hw_status_reg;
};

struct cam_tfe_rdi_hw_info {
	struct cam_tfe_rdi_reg              *rdi_reg;
	struct cam_tfe_rdi_reg_data         *reg_data;
@@ -213,7 +222,11 @@ struct cam_tfe_hw_info {

	uint32_t    reset_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
	uint32_t    error_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
	uint32_t                 bus_reg_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
	uint32_t    bus_reg_irq_mask[CAM_TFE_BUS_MAX_IRQ_REGISTERS];
	uint32_t    bus_error_irq_mask[CAM_TFE_BUS_MAX_IRQ_REGISTERS];

	uint32_t    num_clc;
	struct cam_tfe_clc_hw_status  *clc_hw_status_info;

	uint32_t    top_version;
	void       *top_hw_info;