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Commit 9d378dfa authored by Scott Wood's avatar Scott Wood
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powerpc/booke64: Use SPRG7 for VDSO 



Previously SPRG3 was marked for use by both VDSO and critical
interrupts (though critical interrupts were not fully implemented).

In commit 8b64a9df ("powerpc/booke64:
Use SPRG0/3 scratch for bolted TLB miss & crit int"), Mihai Caraman
made an attempt to resolve this conflict by restoring the VDSO value
early in the critical interrupt, but this has some issues:

 - It's incompatible with EXCEPTION_COMMON which restores r13 from the
   by-then-overwritten scratch (this cost me some debugging time).
 - It forces critical exceptions to be a special case handled
   differently from even machine check and debug level exceptions.
 - It didn't occur to me that it was possible to make this work at all
   (by doing a final "ld r13, PACA_EXCRIT+EX_R13(r13)") until after
   I made (most of) this patch. :-)

It might be worth investigating using a load rather than SPRG on return
from all exceptions (except TLB misses where the scratch never leaves
the SPRG) -- it could save a few cycles.  Until then, let's stick with
SPRG for all exceptions.

Since we cannot use SPRG4-7 for scratch without corrupting the state of
a KVM guest, move VDSO to SPRG7 on book3e.  Since neither SPRG4-7 nor
critical interrupts exist on book3s, SPRG3 is still used for VDSO
there.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Cc: Mihai Caraman <mihai.caraman@freescale.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: kvm-ppc@vger.kernel.org
parent 82d86de2

arch/powerpc/include/asm/exception-64e.h

+2 −3
Original line number Original line Diff line number Diff line
@@ -46,9 +46,8 @@ 
#define EX_CR		(1 * 8)

#define EX_CR		(1 * 8)

#define EX_R10		(2 * 8)

#define EX_R10		(2 * 8)

#define EX_R11		(3 * 8)

#define EX_R11		(3 * 8)

#define EX_R13		(4 * 8)

#define EX_R14		(4 * 8)

#define EX_R14		(5 * 8)

#define EX_R15		(5 * 8)

#define EX_R15		(6 * 8)





/*

/*

 * The TLB miss exception uses different slots.

 * The TLB miss exception uses different slots.

arch/powerpc/include/asm/kvm_booke_hv_asm.h

+1 −8
Original line number Original line Diff line number Diff line
@@ -36,19 +36,12 @@ 
 *   *(r8 + GPR11) = saved r11

 *   *(r8 + GPR11) = saved r11

 *

 *

 * 64-bit host

 * 64-bit host

 * Expected inputs (GEN/GDBELL/DBG/MC exception types):

 * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types):

 *  r10 = saved CR

 *  r10 = saved CR

 *  r13 = PACA_POINTER

 *  r13 = PACA_POINTER

 *  *(r13 + PACA_EX##type + EX_R10) = saved r10

 *  *(r13 + PACA_EX##type + EX_R10) = saved r10

 *  *(r13 + PACA_EX##type + EX_R11) = saved r11

 *  *(r13 + PACA_EX##type + EX_R11) = saved r11

 *  SPRN_SPRG_##type##_SCRATCH = saved r13

 *  SPRN_SPRG_##type##_SCRATCH = saved r13

 *

  * Expected inputs (CRIT exception type):

 *  r10 = saved CR

 *  r13 = PACA_POINTER

 *  *(r13 + PACA_EX##type + EX_R10) = saved r10

 *  *(r13 + PACA_EX##type + EX_R11) = saved r11

 *  *(r13 + PACA_EX##type + EX_R13) = saved r13

 *

 *

 * Expected inputs (TLB exception type):

 * Expected inputs (TLB exception type):

 *  r10 = saved CR

 *  r10 = saved CR

arch/powerpc/include/asm/paca.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -146,7 +146,7 @@ struct paca_struct { 
	u8 io_sync;			/* writel() needs spin_unlock sync */

	u8 io_sync;			/* writel() needs spin_unlock sync */

	u8 irq_work_pending;		/* IRQ_WORK interrupt while soft-disable */

	u8 irq_work_pending;		/* IRQ_WORK interrupt while soft-disable */

	u8 nap_state_lost;		/* NV GPR values lost in power7_idle */

	u8 nap_state_lost;		/* NV GPR values lost in power7_idle */

	u64 sprg3;			/* Saved user-visible sprg */

	u64 sprg_vdso;			/* Saved user-visible sprg */

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

	u64 tm_scratch;                 /* TM scratch area for reclaim */

	u64 tm_scratch;                 /* TM scratch area for reclaim */

#endif

#endif

arch/powerpc/include/asm/reg.h

+10 −3
Original line number Original line Diff line number Diff line
@@ -577,9 +577,13 @@ 
#define SPRN_SPRG3	0x113	/* Special Purpose Register General 3 */

#define SPRN_SPRG3	0x113	/* Special Purpose Register General 3 */

#define SPRN_USPRG3	0x103	/* SPRG3 userspace read */

#define SPRN_USPRG3	0x103	/* SPRG3 userspace read */

#define SPRN_SPRG4	0x114	/* Special Purpose Register General 4 */

#define SPRN_SPRG4	0x114	/* Special Purpose Register General 4 */

#define SPRN_USPRG4	0x104	/* SPRG4 userspace read */

#define SPRN_SPRG5	0x115	/* Special Purpose Register General 5 */

#define SPRN_SPRG5	0x115	/* Special Purpose Register General 5 */

#define SPRN_USPRG5	0x105	/* SPRG5 userspace read */

#define SPRN_SPRG6	0x116	/* Special Purpose Register General 6 */

#define SPRN_SPRG6	0x116	/* Special Purpose Register General 6 */

#define SPRN_USPRG6	0x106	/* SPRG6 userspace read */

#define SPRN_SPRG7	0x117	/* Special Purpose Register General 7 */

#define SPRN_SPRG7	0x117	/* Special Purpose Register General 7 */

#define SPRN_USPRG7	0x107	/* SPRG7 userspace read */

#define SPRN_SRR0	0x01A	/* Save/Restore Register 0 */

#define SPRN_SRR0	0x01A	/* Save/Restore Register 0 */

#define SPRN_SRR1	0x01B	/* Save/Restore Register 1 */

#define SPRN_SRR1	0x01B	/* Save/Restore Register 1 */

#define   SRR1_ISI_NOPT		0x40000000 /* ISI: Not found in hash */

#define   SRR1_ISI_NOPT		0x40000000 /* ISI: Not found in hash */
@@ -879,11 +883,10 @@ 
 * 64-bit embedded

 * 64-bit embedded

 *	- SPRG0 generic exception scratch

 *	- SPRG0 generic exception scratch

 *	- SPRG2 TLB exception stack

 *	- SPRG2 TLB exception stack

 *	- SPRG3 critical exception scratch and

 *	- SPRG3 critical exception scratch (user visible, sorry!)

 *        CPU and NUMA node for VDSO getcpu (user visible)

 *	- SPRG4 unused (user visible)

 *	- SPRG4 unused (user visible)

 *	- SPRG6 TLB miss scratch (user visible, sorry !)

 *	- SPRG6 TLB miss scratch (user visible, sorry !)

 *	- SPRG7 critical exception scratch

 *	- SPRG7 CPU and NUMA node for VDSO getcpu (user visible)

 *	- SPRG8 machine check exception scratch

 *	- SPRG8 machine check exception scratch

 *	- SPRG9 debug exception scratch

 *	- SPRG9 debug exception scratch

 *

 *
@@ -940,6 +943,8 @@ 
#define SPRN_SPRG_SCRATCH0	SPRN_SPRG2

#define SPRN_SPRG_SCRATCH0	SPRN_SPRG2

#define SPRN_SPRG_HPACA		SPRN_HSPRG0

#define SPRN_SPRG_HPACA		SPRN_HSPRG0

#define SPRN_SPRG_HSCRATCH0	SPRN_HSPRG1

#define SPRN_SPRG_HSCRATCH0	SPRN_HSPRG1

#define SPRN_SPRG_VDSO_READ	SPRN_USPRG3

#define SPRN_SPRG_VDSO_WRITE	SPRN_SPRG3





#define GET_PACA(rX)					\

#define GET_PACA(rX)					\

	BEGIN_FTR_SECTION_NESTED(66);			\

	BEGIN_FTR_SECTION_NESTED(66);			\
@@ -983,6 +988,8 @@ 
#define SPRN_SPRG_TLB_SCRATCH	SPRN_SPRG6

#define SPRN_SPRG_TLB_SCRATCH	SPRN_SPRG6

#define SPRN_SPRG_GEN_SCRATCH	SPRN_SPRG0

#define SPRN_SPRG_GEN_SCRATCH	SPRN_SPRG0

#define SPRN_SPRG_GDBELL_SCRATCH SPRN_SPRG_GEN_SCRATCH

#define SPRN_SPRG_GDBELL_SCRATCH SPRN_SPRG_GEN_SCRATCH

#define SPRN_SPRG_VDSO_READ	SPRN_USPRG7

#define SPRN_SPRG_VDSO_WRITE	SPRN_SPRG7





#define SET_PACA(rX)	mtspr	SPRN_SPRG_PACA,rX

#define SET_PACA(rX)	mtspr	SPRN_SPRG_PACA,rX

#define GET_PACA(rX)	mfspr	rX,SPRN_SPRG_PACA

#define GET_PACA(rX)	mfspr	rX,SPRN_SPRG_PACA

arch/powerpc/kernel/asm-offsets.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -253,7 +253,7 @@ int main(void) 
	DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));

	DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));

	DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));

	DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));

	DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));

	DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));

	DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));

	DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso));

#endif /* CONFIG_PPC64 */

#endif /* CONFIG_PPC64 */





	/* RTAS */

	/* RTAS */