Loading drivers/bus/mhi/controllers/mhi_arch_qcom.c +19 −0 Original line number Diff line number Diff line Loading @@ -284,8 +284,11 @@ static int mhi_arch_pcie_scale_bw(struct mhi_controller *mhi_cntrl, { int ret, scale; mhi_cntrl->lpm_disable(mhi_cntrl, mhi_cntrl->priv_data); ret = msm_pcie_set_link_bandwidth(pci_dev, link_info->target_link_speed, link_info->target_link_width); mhi_cntrl->lpm_enable(mhi_cntrl, mhi_cntrl->priv_data); if (ret) return ret; Loading Loading @@ -389,11 +392,13 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) struct arch_info *arch_info = mhi_dev->arch_info; char node[32]; int ret; u16 linkstat; if (!arch_info) { struct msm_pcie_register_event *reg_event; struct pci_dev *root_port; struct device_node *root_ofnode; struct mhi_link_info *cur_link_info; arch_info = devm_kzalloc(&mhi_dev->pci_dev->dev, sizeof(*arch_info), GFP_KERNEL); Loading Loading @@ -482,6 +487,20 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) mhi_arch_pcie_bw_scale_work); mhi_dev->bw_scale = mhi_arch_pcie_bw_scale_cb; /* store the current bw info */ ret = pcie_capability_read_word(mhi_dev->pci_dev, PCI_EXP_LNKSTA, &linkstat); if (ret) return ret; cur_link_info = &arch_info->current_link_info; cur_link_info->target_link_speed = linkstat & PCI_EXP_LNKSTA_CLS; cur_link_info->target_link_width = (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; mhi_cntrl->mhi_link_info = *cur_link_info; mhi_driver_register(&mhi_bl_driver); } Loading drivers/bus/mhi/controllers/mhi_qcom.c +45 −14 Original line number Diff line number Diff line Loading @@ -70,6 +70,10 @@ void mhi_deinit_pci_dev(struct mhi_controller *mhi_cntrl) pm_runtime_mark_last_busy(&pci_dev->dev); pm_runtime_dont_use_autosuspend(&pci_dev->dev); pm_runtime_disable(&pci_dev->dev); /* reset counter for lpm state changes */ mhi_dev->lpm_disable_depth = 0; pci_free_irq_vectors(pci_dev); kfree(mhi_cntrl->irq); mhi_cntrl->irq = NULL; Loading Loading @@ -405,26 +409,38 @@ static int mhi_lpm_disable(struct mhi_controller *mhi_cntrl, void *priv) struct pci_dev *pci_dev = mhi_dev->pci_dev; int lnkctl = pci_dev->pcie_cap + PCI_EXP_LNKCTL; u8 val; int ret; unsigned long flags; int ret = 0; spin_lock_irqsave(&mhi_dev->lpm_lock, flags); /* L1 is already disabled */ if (mhi_dev->lpm_disable_depth) { mhi_dev->lpm_disable_depth++; goto lpm_disable_exit; } ret = pci_read_config_byte(pci_dev, lnkctl, &val); if (ret) { MHI_ERR("Error reading LNKCTL, ret:%d\n", ret); return ret; goto lpm_disable_exit; } /* L1 is not supported or already disabled */ if (!(val & PCI_EXP_LNKCTL_ASPM_L1)) return 0; /* L1 is not supported, do not increment lpm_disable_depth */ if (unlikely(!(val & PCI_EXP_LNKCTL_ASPM_L1))) goto lpm_disable_exit; val &= ~PCI_EXP_LNKCTL_ASPM_L1; ret = pci_write_config_byte(pci_dev, lnkctl, val); if (ret) { MHI_ERR("Error writing LNKCTL to disable LPM, ret:%d\n", ret); return ret; goto lpm_disable_exit; } mhi_dev->lpm_disabled = true; mhi_dev->lpm_disable_depth++; lpm_disable_exit: spin_unlock_irqrestore(&mhi_dev->lpm_lock, flags); return ret; } Loading @@ -436,26 +452,40 @@ static int mhi_lpm_enable(struct mhi_controller *mhi_cntrl, void *priv) struct pci_dev *pci_dev = mhi_dev->pci_dev; int lnkctl = pci_dev->pcie_cap + PCI_EXP_LNKCTL; u8 val; int ret; unsigned long flags; int ret = 0; /* L1 is not supported or already disabled */ if (!mhi_dev->lpm_disabled) return 0; spin_lock_irqsave(&mhi_dev->lpm_lock, flags); /* * Exit if L1 is not supported or is already disabled or * decrementing lpm_disable_depth still keeps it above 0 */ if (!mhi_dev->lpm_disable_depth) goto lpm_enable_exit; if (mhi_dev->lpm_disable_depth > 1) { mhi_dev->lpm_disable_depth--; goto lpm_enable_exit; } ret = pci_read_config_byte(pci_dev, lnkctl, &val); if (ret) { MHI_ERR("Error reading LNKCTL, ret:%d\n", ret); return ret; goto lpm_enable_exit; } val |= PCI_EXP_LNKCTL_ASPM_L1; ret = pci_write_config_byte(pci_dev, lnkctl, val); if (ret) { MHI_ERR("Error writing LNKCTL to enable LPM, ret:%d\n", ret); return ret; goto lpm_enable_exit; } mhi_dev->lpm_disabled = false; mhi_dev->lpm_disable_depth = 0; lpm_enable_exit: spin_unlock_irqrestore(&mhi_dev->lpm_lock, flags); return ret; } Loading Loading @@ -673,6 +703,7 @@ static struct mhi_controller *mhi_register_controller(struct pci_dev *pci_dev) mhi_cntrl->of_node = of_node; mhi_dev->pci_dev = pci_dev; spin_lock_init(&mhi_dev->lpm_lock); /* setup power management apis */ mhi_cntrl->status_cb = mhi_status_cb; Loading drivers/bus/mhi/controllers/mhi_qcom.h +3 −1 Original line number Diff line number Diff line Loading @@ -39,12 +39,14 @@ struct mhi_dev { bool powered_on; dma_addr_t iova_start; dma_addr_t iova_stop; bool lpm_disabled; enum mhi_suspend_mode suspend_mode; /* if set, soc support dynamic bw scaling */ void (*bw_scale)(struct mhi_controller *mhi_cntrl, struct mhi_dev *mhi_dev); unsigned int lpm_disable_depth; /* lock to toggle low power modes */ spinlock_t lpm_lock; }; void mhi_deinit_pci_dev(struct mhi_controller *mhi_cntrl); Loading drivers/bus/mhi/core/mhi_init.c +4 −3 Original line number Diff line number Diff line Loading @@ -199,7 +199,8 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) /* for BHI INTVEC msi */ ret = request_threaded_irq(mhi_cntrl->irq[0], mhi_intvec_handlr, mhi_intvec_threaded_handlr, IRQF_ONESHOT, mhi_intvec_threaded_handlr, IRQF_ONESHOT | IRQF_NO_SUSPEND, "mhi", mhi_cntrl); if (ret) return ret; Loading @@ -209,8 +210,8 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) continue; ret = request_irq(mhi_cntrl->irq[mhi_event->msi], mhi_msi_handlr, IRQF_SHARED, "mhi", mhi_event); mhi_msi_handlr, IRQF_SHARED | IRQF_NO_SUSPEND, "mhi", mhi_event); if (ret) { MHI_ERR("Error requesting irq:%d for ev:%d\n", mhi_cntrl->irq[mhi_event->msi], i); Loading drivers/bus/mhi/devices/mhi_satellite.c +1 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,7 @@ #define MHI_SAT_DRIVER_NAME "mhi_satellite" static bool mhi_sat_defer_init = true; /* set by default */ static bool mhi_sat_defer_init; /* logging macros */ #define IPC_LOG_PAGES (10) Loading Loading
drivers/bus/mhi/controllers/mhi_arch_qcom.c +19 −0 Original line number Diff line number Diff line Loading @@ -284,8 +284,11 @@ static int mhi_arch_pcie_scale_bw(struct mhi_controller *mhi_cntrl, { int ret, scale; mhi_cntrl->lpm_disable(mhi_cntrl, mhi_cntrl->priv_data); ret = msm_pcie_set_link_bandwidth(pci_dev, link_info->target_link_speed, link_info->target_link_width); mhi_cntrl->lpm_enable(mhi_cntrl, mhi_cntrl->priv_data); if (ret) return ret; Loading Loading @@ -389,11 +392,13 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) struct arch_info *arch_info = mhi_dev->arch_info; char node[32]; int ret; u16 linkstat; if (!arch_info) { struct msm_pcie_register_event *reg_event; struct pci_dev *root_port; struct device_node *root_ofnode; struct mhi_link_info *cur_link_info; arch_info = devm_kzalloc(&mhi_dev->pci_dev->dev, sizeof(*arch_info), GFP_KERNEL); Loading Loading @@ -482,6 +487,20 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) mhi_arch_pcie_bw_scale_work); mhi_dev->bw_scale = mhi_arch_pcie_bw_scale_cb; /* store the current bw info */ ret = pcie_capability_read_word(mhi_dev->pci_dev, PCI_EXP_LNKSTA, &linkstat); if (ret) return ret; cur_link_info = &arch_info->current_link_info; cur_link_info->target_link_speed = linkstat & PCI_EXP_LNKSTA_CLS; cur_link_info->target_link_width = (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; mhi_cntrl->mhi_link_info = *cur_link_info; mhi_driver_register(&mhi_bl_driver); } Loading
drivers/bus/mhi/controllers/mhi_qcom.c +45 −14 Original line number Diff line number Diff line Loading @@ -70,6 +70,10 @@ void mhi_deinit_pci_dev(struct mhi_controller *mhi_cntrl) pm_runtime_mark_last_busy(&pci_dev->dev); pm_runtime_dont_use_autosuspend(&pci_dev->dev); pm_runtime_disable(&pci_dev->dev); /* reset counter for lpm state changes */ mhi_dev->lpm_disable_depth = 0; pci_free_irq_vectors(pci_dev); kfree(mhi_cntrl->irq); mhi_cntrl->irq = NULL; Loading Loading @@ -405,26 +409,38 @@ static int mhi_lpm_disable(struct mhi_controller *mhi_cntrl, void *priv) struct pci_dev *pci_dev = mhi_dev->pci_dev; int lnkctl = pci_dev->pcie_cap + PCI_EXP_LNKCTL; u8 val; int ret; unsigned long flags; int ret = 0; spin_lock_irqsave(&mhi_dev->lpm_lock, flags); /* L1 is already disabled */ if (mhi_dev->lpm_disable_depth) { mhi_dev->lpm_disable_depth++; goto lpm_disable_exit; } ret = pci_read_config_byte(pci_dev, lnkctl, &val); if (ret) { MHI_ERR("Error reading LNKCTL, ret:%d\n", ret); return ret; goto lpm_disable_exit; } /* L1 is not supported or already disabled */ if (!(val & PCI_EXP_LNKCTL_ASPM_L1)) return 0; /* L1 is not supported, do not increment lpm_disable_depth */ if (unlikely(!(val & PCI_EXP_LNKCTL_ASPM_L1))) goto lpm_disable_exit; val &= ~PCI_EXP_LNKCTL_ASPM_L1; ret = pci_write_config_byte(pci_dev, lnkctl, val); if (ret) { MHI_ERR("Error writing LNKCTL to disable LPM, ret:%d\n", ret); return ret; goto lpm_disable_exit; } mhi_dev->lpm_disabled = true; mhi_dev->lpm_disable_depth++; lpm_disable_exit: spin_unlock_irqrestore(&mhi_dev->lpm_lock, flags); return ret; } Loading @@ -436,26 +452,40 @@ static int mhi_lpm_enable(struct mhi_controller *mhi_cntrl, void *priv) struct pci_dev *pci_dev = mhi_dev->pci_dev; int lnkctl = pci_dev->pcie_cap + PCI_EXP_LNKCTL; u8 val; int ret; unsigned long flags; int ret = 0; /* L1 is not supported or already disabled */ if (!mhi_dev->lpm_disabled) return 0; spin_lock_irqsave(&mhi_dev->lpm_lock, flags); /* * Exit if L1 is not supported or is already disabled or * decrementing lpm_disable_depth still keeps it above 0 */ if (!mhi_dev->lpm_disable_depth) goto lpm_enable_exit; if (mhi_dev->lpm_disable_depth > 1) { mhi_dev->lpm_disable_depth--; goto lpm_enable_exit; } ret = pci_read_config_byte(pci_dev, lnkctl, &val); if (ret) { MHI_ERR("Error reading LNKCTL, ret:%d\n", ret); return ret; goto lpm_enable_exit; } val |= PCI_EXP_LNKCTL_ASPM_L1; ret = pci_write_config_byte(pci_dev, lnkctl, val); if (ret) { MHI_ERR("Error writing LNKCTL to enable LPM, ret:%d\n", ret); return ret; goto lpm_enable_exit; } mhi_dev->lpm_disabled = false; mhi_dev->lpm_disable_depth = 0; lpm_enable_exit: spin_unlock_irqrestore(&mhi_dev->lpm_lock, flags); return ret; } Loading Loading @@ -673,6 +703,7 @@ static struct mhi_controller *mhi_register_controller(struct pci_dev *pci_dev) mhi_cntrl->of_node = of_node; mhi_dev->pci_dev = pci_dev; spin_lock_init(&mhi_dev->lpm_lock); /* setup power management apis */ mhi_cntrl->status_cb = mhi_status_cb; Loading
drivers/bus/mhi/controllers/mhi_qcom.h +3 −1 Original line number Diff line number Diff line Loading @@ -39,12 +39,14 @@ struct mhi_dev { bool powered_on; dma_addr_t iova_start; dma_addr_t iova_stop; bool lpm_disabled; enum mhi_suspend_mode suspend_mode; /* if set, soc support dynamic bw scaling */ void (*bw_scale)(struct mhi_controller *mhi_cntrl, struct mhi_dev *mhi_dev); unsigned int lpm_disable_depth; /* lock to toggle low power modes */ spinlock_t lpm_lock; }; void mhi_deinit_pci_dev(struct mhi_controller *mhi_cntrl); Loading
drivers/bus/mhi/core/mhi_init.c +4 −3 Original line number Diff line number Diff line Loading @@ -199,7 +199,8 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) /* for BHI INTVEC msi */ ret = request_threaded_irq(mhi_cntrl->irq[0], mhi_intvec_handlr, mhi_intvec_threaded_handlr, IRQF_ONESHOT, mhi_intvec_threaded_handlr, IRQF_ONESHOT | IRQF_NO_SUSPEND, "mhi", mhi_cntrl); if (ret) return ret; Loading @@ -209,8 +210,8 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) continue; ret = request_irq(mhi_cntrl->irq[mhi_event->msi], mhi_msi_handlr, IRQF_SHARED, "mhi", mhi_event); mhi_msi_handlr, IRQF_SHARED | IRQF_NO_SUSPEND, "mhi", mhi_event); if (ret) { MHI_ERR("Error requesting irq:%d for ev:%d\n", mhi_cntrl->irq[mhi_event->msi], i); Loading
drivers/bus/mhi/devices/mhi_satellite.c +1 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,7 @@ #define MHI_SAT_DRIVER_NAME "mhi_satellite" static bool mhi_sat_defer_init = true; /* set by default */ static bool mhi_sat_defer_init; /* logging macros */ #define IPC_LOG_PAGES (10) Loading