Loading arch/blackfin/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,7 @@ endchoice config SMP depends on BF561 select GENERIC_TIME bool "Symmetric multi-processing support" ---help--- This enables support for systems with more than one CPU, Loading arch/blackfin/kernel/time.c +19 −34 Original line number Diff line number Diff line Loading @@ -24,14 +24,10 @@ static struct irqaction bfin_timer_irq = { .name = "Blackfin Timer Tick", #ifdef CONFIG_IRQ_PER_CPU .flags = IRQF_DISABLED | IRQF_PERCPU, #else .flags = IRQF_DISABLED #endif }; #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) void __init setup_system_timer0(void) { /* Power down the core timer, just to play safe. */ Loading Loading @@ -74,7 +70,7 @@ void __init setup_core_timer(void) static void __init time_sched_init(irqreturn_t(*timer_routine) (int, void *)) { #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) setup_system_timer0(); bfin_timer_irq.handler = timer_routine; setup_irq(IRQ_TIMER0, &bfin_timer_irq); Loading @@ -94,7 +90,7 @@ static unsigned long gettimeoffset(void) unsigned long offset; unsigned long clocks_per_jiffy; #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); offset = bfin_read_TIMER0_COUNTER() / \ (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); Loading Loading @@ -133,13 +129,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy) static long last_rtc_update; write_seqlock(&xtime_lock); #if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE) /* * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is * enabled. */ if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { #endif do_timer(1); /* Loading @@ -159,10 +148,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy) /* Do it again in 60s. */ last_rtc_update = xtime.tv_sec - 600; } #if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE) set_gptimer_status(0, TIMER_STATUS_TIMIL0); } #endif write_sequnlock(&xtime_lock); #ifdef CONFIG_IPIPE Loading Loading
arch/blackfin/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,7 @@ endchoice config SMP depends on BF561 select GENERIC_TIME bool "Symmetric multi-processing support" ---help--- This enables support for systems with more than one CPU, Loading
arch/blackfin/kernel/time.c +19 −34 Original line number Diff line number Diff line Loading @@ -24,14 +24,10 @@ static struct irqaction bfin_timer_irq = { .name = "Blackfin Timer Tick", #ifdef CONFIG_IRQ_PER_CPU .flags = IRQF_DISABLED | IRQF_PERCPU, #else .flags = IRQF_DISABLED #endif }; #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) void __init setup_system_timer0(void) { /* Power down the core timer, just to play safe. */ Loading Loading @@ -74,7 +70,7 @@ void __init setup_core_timer(void) static void __init time_sched_init(irqreturn_t(*timer_routine) (int, void *)) { #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) setup_system_timer0(); bfin_timer_irq.handler = timer_routine; setup_irq(IRQ_TIMER0, &bfin_timer_irq); Loading @@ -94,7 +90,7 @@ static unsigned long gettimeoffset(void) unsigned long offset; unsigned long clocks_per_jiffy; #if defined(CONFIG_TICKSOURCE_GPTMR0) || defined(CONFIG_IPIPE) #if defined(CONFIG_IPIPE) clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); offset = bfin_read_TIMER0_COUNTER() / \ (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); Loading Loading @@ -133,13 +129,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy) static long last_rtc_update; write_seqlock(&xtime_lock); #if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE) /* * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is * enabled. */ if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { #endif do_timer(1); /* Loading @@ -159,10 +148,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy) /* Do it again in 60s. */ last_rtc_update = xtime.tv_sec - 600; } #if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE) set_gptimer_status(0, TIMER_STATUS_TIMIL0); } #endif write_sequnlock(&xtime_lock); #ifdef CONFIG_IPIPE Loading