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Commit 9b865d9b authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'qcom-soc-for-3.20-2' of...

Merge tag 'qcom-soc-for-3.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc

merge "qcom SoC changes for v3.20-2" from Kumar Gala:

Qualcomm ARM Based SoC Updates for v3.20-2

* Various bug fixes and minor feature additions to scm code
* Added big-endian support to debug MSM uart
* Added big-endian support to ARCH_QCOM
* Cleaned up some Kconfig options associated with ARCH_QCOM
* Added Andy Gross as co-maintainer

* tag 'qcom-soc-for-3.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom

:
  MAINTAINERS: Add co-maintainer for ARM/Qualcomm Support
  ARM: qcom: Drop unnecessary selects from ARCH_QCOM
  ARM: qcom: Fix SCM interface for big-endian kernels
  ARM: qcom: scm: Clarify boot interface
  ARM: qcom: Add SCM warmboot flags for quad core targets.
  ARM: qcom: scm: Add logging of actual return code from scm call
  ARM: qcom: scm: Flush the command buffer only instead of the entire cache
  ARM: qcom: scm: Get cacheline size from CTR
  ARM: qcom: scm: Fix incorrect cache invalidation
  ARM: qcom: Select ARCH_SUPPORTS_BIG_ENDIAN
  ARM: debug: msm: Support big-endian CPUs
  ARM: debug: Update MSM and QCOM DEBUG_LL help

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 82483ad6 f5d3af9d
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+3 −0
Original line number Diff line number Diff line
@@ -1291,10 +1291,13 @@ S: Maintained

ARM/QUALCOMM SUPPORT
M:	Kumar Gala <galak@codeaurora.org>
M:	Andy Gross <agross@codeaurora.org>
M:	David Brown <davidb@codeaurora.org>
L:	linux-arm-msm@vger.kernel.org
L:	linux-soc@vger.kernel.org
S:	Maintained
F:	arch/arm/mach-qcom/
F:	drivers/soc/qcom/
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git

ARM/RADISYS ENP2611 MACHINE SUPPORT
+3 −2
Original line number Diff line number Diff line
@@ -438,7 +438,7 @@ choice
		  Say Y here if you want the debug print routines to direct
		  their output to the serial port on MSM devices.

		  ARCH                DEBUG_UART_PHYS   DEBUG_UART_BASE   #
		  ARCH                DEBUG_UART_PHYS   DEBUG_UART_VIRT   #
		  MSM7X00A, QSD8X50   0xa9a00000        0xe1000000        UART1
		  MSM7X00A, QSD8X50   0xa9b00000        0xe1000000        UART2
		  MSM7X00A, QSD8X50   0xa9c00000        0xe1000000        UART3
@@ -457,7 +457,8 @@ choice
		  Say Y here if you want the debug print routines to direct
		  their output to the serial port on Qualcomm devices.

		  ARCH      DEBUG_UART_PHYS   DEBUG_UART_BASE
		  ARCH      DEBUG_UART_PHYS   DEBUG_UART_VIRT
		  APQ8064   0x16640000        0xf0040000
		  APQ8084   0xf995e000        0xfa75e000
		  MSM8X60   0x19c40000        0xf0040000
		  MSM8960   0x16440000        0xf0040000
+6 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@
	.endm

	.macro	senduart, rd, rx
ARM_BE8(rev	\rd, \rd )
#ifdef CONFIG_DEBUG_QCOM_UARTDM
	@ Write the 1 character to UARTDM_TF
	str	\rd, [\rx, #0x70]
@@ -35,24 +36,29 @@
#ifdef CONFIG_DEBUG_QCOM_UARTDM
	@ check for TX_EMT in UARTDM_SR
	ldr	\rd, [\rx, #0x08]
ARM_BE8(rev     \rd, \rd )
	tst	\rd, #0x08
	bne	1002f
	@ wait for TXREADY in UARTDM_ISR
1001:	ldr	\rd, [\rx, #0x14]
ARM_BE8(rev     \rd, \rd )
	tst	\rd, #0x80
	beq 	1001b
1002:
	@ Clear TX_READY by writing to the UARTDM_CR register
	mov	\rd, #0x300
ARM_BE8(rev     \rd, \rd )
	str	\rd, [\rx, #0x10]
	@ Write 0x1 to NCF register
	mov 	\rd, #0x1
ARM_BE8(rev     \rd, \rd )
	str	\rd, [\rx, #0x40]
	@ UARTDM reg. Read to induce delay
	ldr	\rd, [\rx, #0x08]
#else
	@ wait for TX_READY
1001:	ldr	\rd, [\rx, #0x08]
ARM_BE8(rev     \rd, \rd )
	tst	\rd, #0x04
	beq	1001b
#endif
+1 −2
Original line number Diff line number Diff line
menuconfig ARCH_QCOM
	bool "Qualcomm Support" if ARCH_MULTI_V7
	select ARCH_REQUIRE_GPIOLIB
	select ARCH_SUPPORTS_BIG_ENDIAN
	select ARM_GIC
	select ARM_AMBA
	select CLKSRC_OF
	select PINCTRL
	select QCOM_SCM if SMP
	help
+5 −5
Original line number Diff line number Diff line
@@ -24,15 +24,15 @@
/*
 * Set the cold/warm boot address for one of the CPU cores.
 */
int scm_set_boot_addr(phys_addr_t addr, int flags)
int scm_set_boot_addr(u32 addr, int flags)
{
	struct {
		unsigned int flags;
		phys_addr_t  addr;
		__le32 flags;
		__le32 addr;
	} cmd;

	cmd.addr = addr;
	cmd.flags = flags;
	cmd.addr = cpu_to_le32(addr);
	cmd.flags = cpu_to_le32(flags);
	return scm_call(SCM_SVC_BOOT, SCM_BOOT_ADDR,
			&cmd, sizeof(cmd), NULL, 0);
}
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