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Commit 9b58419e authored by Golan Ben Ami's avatar Golan Ben Ami Committed by Luca Coelho
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iwlwifi: update gen3 interrupts - sw error and image response 



In 22560 devices the ROM sendis an interrupt to the host
once the IML reading is done.
Handle this interrupt, and indicate sw error in case the
value is fail.

Additionally, the cause for sw error in 22560 devices
have been changed, so update the cause list.

Signed-off-by: default avatarGolan Ben Ami <golan.ben.ami@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 9f358c17

drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h

+1 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ 
#define CSR_CTXT_INFO_ADDR              0x118

#define CSR_IML_DATA_ADDR               0x120

#define CSR_IML_SIZE_ADDR               0x128

#define CSR_IML_RESP_ADDR               0x12c



/* Set bit for enabling automatic function boot */

#define CSR_AUTO_FUNC_BOOT_ENA          BIT(1)

drivers/net/wireless/intel/iwlwifi/iwl-csr.h

+2 −0
Original line number Diff line number Diff line
@@ -595,6 +595,8 @@ enum msix_fh_int_causes { 
enum msix_hw_int_causes {

	MSIX_HW_INT_CAUSES_REG_ALIVE		= BIT(0),

	MSIX_HW_INT_CAUSES_REG_WAKEUP		= BIT(1),

	MSIX_HW_INT_CAUSES_REG_IPC		= BIT(1),

	MSIX_HW_INT_CAUSES_REG_SW_ERR_V2	= BIT(5),

	MSIX_HW_INT_CAUSES_REG_CT_KILL		= BIT(6),

	MSIX_HW_INT_CAUSES_REG_RF_KILL		= BIT(7),

	MSIX_HW_INT_CAUSES_REG_PERIODIC		= BIT(8),

drivers/net/wireless/intel/iwlwifi/pcie/internal.h

+12 −0
Original line number Diff line number Diff line
@@ -323,6 +323,18 @@ enum iwl_shared_irq_flags { 
	IWL_SHARED_IRQ_FIRST_RSS	= BIT(1),

};



/**

 * enum iwl_image_response_code - image response values

 * @IWL_IMAGE_RESP_DEF: the default value of the register

 * @IWL_IMAGE_RESP_SUCCESS: iml was read successfully

 * @IWL_IMAGE_RESP_FAIL: iml reading failed

 */

enum iwl_image_response_code {

	IWL_IMAGE_RESP_DEF		= 0,

	IWL_IMAGE_RESP_SUCCESS		= 1,

	IWL_IMAGE_RESP_FAIL		= 2,

};



/**

 * struct iwl_dram_data

 * @physical: page phy pointer

drivers/net/wireless/intel/iwlwifi/pcie/rx.c

+16 −5
Original line number Diff line number Diff line
@@ -18,8 +18,7 @@ 
 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program; if not, write to the Free Software Foundation, Inc.,

 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA

 * this program.

 *

 * The full GNU General Public License is included in this distribution in the

 * file called LICENSE.
@@ -37,6 +36,7 @@ 
#include "iwl-io.h"

#include "internal.h"

#include "iwl-op-mode.h"

#include "iwl-context-info-gen3.h"



/******************************************************************************

 *
@@ -2009,7 +2009,8 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id) 


	/* Error detected by uCode */

	if ((inta_fh & MSIX_FH_INT_CAUSES_FH_ERR) ||

	    (inta_hw & MSIX_HW_INT_CAUSES_REG_SW_ERR)) {

	    (inta_hw & MSIX_HW_INT_CAUSES_REG_SW_ERR) ||

	    (inta_hw & MSIX_HW_INT_CAUSES_REG_SW_ERR_V2)) {

		IWL_ERR(trans,

			"Microcode SW error detected. Restarting 0x%X.\n",

			inta_fh);
@@ -2034,8 +2035,18 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id) 
		}

	}



	if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560 &&

	    inta_hw & MSIX_HW_INT_CAUSES_REG_IPC) {

		/* Reflect IML transfer status */

		int res = iwl_read32(trans, CSR_IML_RESP_ADDR);



		IWL_DEBUG_ISR(trans, "IML transfer status: %d\n", res);

		if (res == IWL_IMAGE_RESP_FAIL) {

			isr_stats->sw++;

			iwl_pcie_irq_handle_error(trans);

		}

	} else if (inta_hw & MSIX_HW_INT_CAUSES_REG_WAKEUP) {

		/* uCode wakes up after power-down sleep */

	if (inta_hw & MSIX_HW_INT_CAUSES_REG_WAKEUP) {

		IWL_DEBUG_ISR(trans, "Wakeup interrupt\n");

		iwl_pcie_rxq_check_wrptr(trans);

		iwl_pcie_txq_check_wrptrs(trans);

drivers/net/wireless/intel/iwlwifi/pcie/trans.c

+28 −5
Original line number Diff line number Diff line
@@ -1132,21 +1132,44 @@ static struct iwl_causes_list causes_list[] = { 
	{MSIX_HW_INT_CAUSES_REG_HAP,		CSR_MSIX_HW_INT_MASK_AD, 0x2E},

};



static struct iwl_causes_list causes_list_v2[] = {

	{MSIX_FH_INT_CAUSES_D2S_CH0_NUM,	CSR_MSIX_FH_INT_MASK_AD, 0},

	{MSIX_FH_INT_CAUSES_D2S_CH1_NUM,	CSR_MSIX_FH_INT_MASK_AD, 0x1},

	{MSIX_FH_INT_CAUSES_S2D,		CSR_MSIX_FH_INT_MASK_AD, 0x3},

	{MSIX_FH_INT_CAUSES_FH_ERR,		CSR_MSIX_FH_INT_MASK_AD, 0x5},

	{MSIX_HW_INT_CAUSES_REG_ALIVE,		CSR_MSIX_HW_INT_MASK_AD, 0x10},

	{MSIX_HW_INT_CAUSES_REG_IPC,		CSR_MSIX_HW_INT_MASK_AD, 0x11},

	{MSIX_HW_INT_CAUSES_REG_SW_ERR_V2,	CSR_MSIX_HW_INT_MASK_AD, 0x15},

	{MSIX_HW_INT_CAUSES_REG_CT_KILL,	CSR_MSIX_HW_INT_MASK_AD, 0x16},

	{MSIX_HW_INT_CAUSES_REG_RF_KILL,	CSR_MSIX_HW_INT_MASK_AD, 0x17},

	{MSIX_HW_INT_CAUSES_REG_PERIODIC,	CSR_MSIX_HW_INT_MASK_AD, 0x18},

	{MSIX_HW_INT_CAUSES_REG_SCD,		CSR_MSIX_HW_INT_MASK_AD, 0x2A},

	{MSIX_HW_INT_CAUSES_REG_FH_TX,		CSR_MSIX_HW_INT_MASK_AD, 0x2B},

	{MSIX_HW_INT_CAUSES_REG_HW_ERR,		CSR_MSIX_HW_INT_MASK_AD, 0x2D},

	{MSIX_HW_INT_CAUSES_REG_HAP,		CSR_MSIX_HW_INT_MASK_AD, 0x2E},

};



static void iwl_pcie_map_non_rx_causes(struct iwl_trans *trans)

{

	struct iwl_trans_pcie *trans_pcie =  IWL_TRANS_GET_PCIE_TRANS(trans);

	int val = trans_pcie->def_irq | MSIX_NON_AUTO_CLEAR_CAUSE;

	int i;

	int i, arr_size =

		(trans->cfg->device_family < IWL_DEVICE_FAMILY_22560) ?

		ARRAY_SIZE(causes_list) : ARRAY_SIZE(causes_list_v2);



	/*

	 * Access all non RX causes and map them to the default irq.

	 * In case we are missing at least one interrupt vector,

	 * the first interrupt vector will serve non-RX and FBQ causes.

	 */

	for (i = 0; i < ARRAY_SIZE(causes_list); i++) {

		iwl_write8(trans, CSR_MSIX_IVAR(causes_list[i].addr), val);

		iwl_clear_bit(trans, causes_list[i].mask_reg,

			      causes_list[i].cause_num);

	for (i = 0; i < arr_size; i++) {

		struct iwl_causes_list *causes =

			(trans->cfg->device_family < IWL_DEVICE_FAMILY_22560) ?

			causes_list : causes_list_v2;



		iwl_write8(trans, CSR_MSIX_IVAR(causes[i].addr), val);

		iwl_clear_bit(trans, causes[i].mask_reg,

			      causes[i].cause_num);

	}

}