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Commit 9a21059d authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: add UVD tiling addr config v2 



v2: set UVD tiling config for rv730

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
parent ec5891fb

drivers/gpu/drm/radeon/evergreen.c

+3 −0
Original line number Diff line number Diff line
@@ -2269,6 +2269,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 
	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

	WREG32(HDP_ADDR_CONFIG, gb_addr_config);

	WREG32(DMA_TILING_CONFIG, gb_addr_config);

	WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

	WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

	WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);



	if ((rdev->config.evergreen.max_backends == 1) &&

	    (rdev->flags & RADEON_IS_IGP)) {

drivers/gpu/drm/radeon/evergreend.h

+3 −0
Original line number Diff line number Diff line
@@ -1033,6 +1033,9 @@ 
/*

 * UVD

 */

#define UVD_UDEC_ADDR_CONFIG				0xef4c

#define UVD_UDEC_DB_ADDR_CONFIG				0xef50

#define UVD_UDEC_DBW_ADDR_CONFIG			0xef54

#define UVD_RBC_RB_RPTR					0xf690

#define UVD_RBC_RB_WPTR					0xf694

drivers/gpu/drm/radeon/ni.c

+3 −0
Original line number Diff line number Diff line
@@ -626,6 +626,9 @@ static void cayman_gpu_init(struct radeon_device *rdev) 
	WREG32(HDP_ADDR_CONFIG, gb_addr_config);

	WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

	WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

	WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

	WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

	WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);



	if ((rdev->config.cayman.max_backends_per_se == 1) &&

	    (rdev->flags & RADEON_IS_IGP)) {

drivers/gpu/drm/radeon/nid.h

+3 −0
Original line number Diff line number Diff line
@@ -495,6 +495,9 @@ 
#define UVD_SEMA_ADDR_LOW				0xEF00

#define UVD_SEMA_ADDR_HIGH				0xEF04

#define UVD_SEMA_CMD					0xEF08

#define UVD_UDEC_ADDR_CONFIG				0xEF4C

#define UVD_UDEC_DB_ADDR_CONFIG				0xEF50

#define UVD_UDEC_DBW_ADDR_CONFIG			0xEF54

#define UVD_RBC_RB_RPTR					0xF690

#define UVD_RBC_RB_WPTR					0xF694

drivers/gpu/drm/radeon/rv770.c

+5 −0
Original line number Diff line number Diff line
@@ -866,6 +866,11 @@ static void rv770_gpu_init(struct radeon_device *rdev) 
	WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));

	WREG32(DMA_TILING_CONFIG, (gb_tiling_config & 0xffff));

	WREG32(DMA_TILING_CONFIG2, (gb_tiling_config & 0xffff));

	if (rdev->family == CHIP_RV730) {

		WREG32(UVD_UDEC_DB_TILING_CONFIG, (gb_tiling_config & 0xffff));

		WREG32(UVD_UDEC_DBW_TILING_CONFIG, (gb_tiling_config & 0xffff));

		WREG32(UVD_UDEC_TILING_CONFIG, (gb_tiling_config & 0xffff));

	}



	WREG32(CGTS_SYS_TCC_DISABLE, 0);

	WREG32(CGTS_TCC_DISABLE, 0);