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Commit 99a735b3 authored by Qipeng Zha's avatar Qipeng Zha Committed by Linus Walleij
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pinctrl: intel: fix offset calculation issue of register PAD_OWN 



The calculation equation of PAD_OWN register offset is not
correct for Broxton, verified this fix will get right
offset for Broxton.

Signed-off-by: default avatarQi Zheng <qi.zheng@intel.com>
Signed-off-by: default avatarQipeng Zha <qipeng.zha@intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 618a919b

drivers/pinctrl/intel/pinctrl-intel.c

+5 −4
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ 
#define PADOWN_BITS			4

#define PADOWN_SHIFT(p)			((p) % 8 * PADOWN_BITS)

#define PADOWN_MASK(p)			(0xf << PADOWN_SHIFT(p))

#define PADOWN_GPP(p)			((p) / 8)



/* Offset from pad_regs */

#define PADCFG0				0x000
@@ -139,7 +140,7 @@ static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin, 
static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)

{

	const struct intel_community *community;

	unsigned padno, gpp, gpp_offset, offset;

	unsigned padno, gpp, offset, group;

	void __iomem *padown;



	community = intel_get_community(pctrl, pin);
@@ -149,9 +150,9 @@ static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin) 
		return true;



	padno = pin_to_padno(community, pin);

	gpp = padno / NPADS_IN_GPP;

	gpp_offset = padno % NPADS_IN_GPP;

	offset = community->padown_offset + gpp * 16 + (gpp_offset / 8) * 4;

	group = padno / community->gpp_size;

	gpp = PADOWN_GPP(padno % community->gpp_size);

	offset = community->padown_offset + 0x10 * group + gpp * 4;

	padown = community->regs + offset;



	return !(readl(padown) & PADOWN_MASK(padno));