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Commit 997f9f27 authored by Alok Chauhan's avatar Alok Chauhan
Browse files

i3c: master-qcom-geni: Enable support for IBI controller 



Enable IBI controller to detect and handle IBI
(In-Band Interrupt) requests from I3C slaves connected
on I3C bus.

IBI is method whereby a I3C slave device notify the master
of an interrupt on I3C bus.

Change-Id: I2023fcc93dd45daa24f67be10cfd87314a9bc39b
Signed-off-by: default avatarAlok Chauhan <alokc@codeaurora.org>
parent b482dc81

drivers/i3c/master/i3c-master-qcom-geni.c

+687 −77

File changed.

Preview size limit exceeded, changes collapsed.

drivers/platform/msm/qcom-geni-se.c

+4 −2
Original line number Diff line number Diff line
@@ -335,14 +335,16 @@ static int geni_se_select_fifo_mode(void __iomem *base) 
			M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);

		common_geni_s_irq_en |= S_CMD_DONE_EN;

	}



	if (proto == I3C)

		common_geni_m_irq_en |=  (M_GP_SYNC_IRQ_0_EN | M_SEC_IRQ_EN);



	geni_dma_mode &= ~GENI_DMA_MODE_EN;



	geni_write_reg(common_geni_m_irq_en, base, SE_GENI_M_IRQ_EN);

	geni_write_reg(common_geni_s_irq_en, base, SE_GENI_S_IRQ_EN);

	geni_write_reg(geni_dma_mode, base, SE_GENI_DMA_MODE_EN);



	if (proto == I3C)

		geni_write_reg(0x3, base, GENI_I3C_IBI_LEGACY);

	return 0;

}

include/linux/qcom-geni-se.h

+1 −5
Original line number Diff line number Diff line
@@ -117,7 +117,6 @@ struct se_geni_rsc { 
#define SE_GENI_IOS			(0x908)

#define SE_GENI_M_GP_LENGTH		(0x910)

#define SE_GENI_S_GP_LENGTH		(0x914)

#define GENI_I3C_IBI_LEGACY		(0xA9c)

#define SE_GSI_EVENT_EN			(0xE18)

#define SE_IRQ_EN			(0xE1C)

#define SE_HW_PARAM_0			(0xE24)
@@ -262,10 +261,6 @@ struct se_geni_rsc { 
#define GENI_M_EVENT_EN		(BIT(2))

#define GENI_S_EVENT_EN		(BIT(3))



/* GENI_I3C_IBI_LEGACY fields */

#define I3C_IBI_LEGACY_EN	(BIT(0))

#define I3C_IBI_LEGACY_PORTS_EN	(BIT(1))



/* SE_GENI_IOS fields */

#define IO2_DATA_IN		(BIT(1))

#define RX_DATA_IN		(BIT(0))
@@ -281,6 +276,7 @@ struct se_geni_rsc { 
#define TX_FIFO_WIDTH_SHFT	(24)

#define TX_FIFO_DEPTH_MSK	(GENMASK(21, 16))

#define TX_FIFO_DEPTH_SHFT	(16)

#define GEN_I3C_IBI_CTRL	(BIT(7))



/* SE_HW_PARAM_1 fields */

#define RX_FIFO_WIDTH_MSK	(GENMASK(29, 24))