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Commit 991b53de authored by Mukund Madhusudan Atre's avatar Mukund Madhusudan Atre Committed by Gerrit - the friendly Code Review server
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Revert "msm: camera: isp: Change voting logic to support new ports in sdmmagpie" 



This reverts commit e9e13063.Required for
making changes to bw voting in vfe which provides only one cpas handle
per client hw.

Change-Id: I7230a7dca197479fc28aed307c3c9a2a1b74d327
Signed-off-by: default avatarMukund Madhusudan Atre <matre@codeaurora.org>
parent c153c0af

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_soc.c

+14 −68
Original line number Diff line number Diff line
@@ -156,49 +156,18 @@ int cam_vfe_init_soc_resources(struct cam_hw_soc_info *soc_info, 
	}



	memset(&cpas_register_param, 0, sizeof(cpas_register_param));



	strlcpy(cpas_register_param.identifier, "ife",

		CAM_HW_IDENTIFIER_LENGTH);

	cpas_register_param.cell_index = soc_info->index;

	cpas_register_param.dev = soc_info->dev;

	cpas_register_param.cam_cpas_client_cb = cam_vfe_cpas_cb;

	cpas_register_param.userdata = soc_info;



	switch (soc_private->cpas_version) {

	case CAM_CPAS_TITAN_175_V120:

		strlcpy(cpas_register_param.identifier, "iferdi",

			CAM_HW_IDENTIFIER_LENGTH);

		rc = cam_cpas_register_client(&cpas_register_param);

		if (rc) {

			CAM_ERR(CAM_ISP, "rdi CPAS registration failed rc=%d",

				rc);

			goto release_soc;

		} else {

			soc_private->cpas_handle[0] =

				cpas_register_param.client_handle;

		}



		strlcpy(cpas_register_param.identifier, "ifenrdi",

			CAM_HW_IDENTIFIER_LENGTH);

		rc = cam_cpas_register_client(&cpas_register_param);

		if (rc) {

			CAM_ERR(CAM_ISP, "nrdi CPAS registration failed rc=%d",

				rc);

			goto release_soc;

		} else {

			soc_private->cpas_handle[1] =

				cpas_register_param.client_handle;

		}

		break;

	default:

		strlcpy(cpas_register_param.identifier, "ife",

			CAM_HW_IDENTIFIER_LENGTH);

	rc = cam_cpas_register_client(&cpas_register_param);

	if (rc) {

		CAM_ERR(CAM_ISP, "CPAS registration failed rc=%d", rc);

		goto release_soc;

	} else {

			soc_private->cpas_handle[0] =

				cpas_register_param.client_handle;

		}

		soc_private->cpas_handle = cpas_register_param.client_handle;

	}

	return rc;
@@ -225,15 +194,10 @@ int cam_vfe_deinit_soc_resources(struct cam_hw_soc_info *soc_info) 
		CAM_ERR(CAM_ISP, "Error! soc_private NULL");

		return -ENODEV;

	}

	rc = cam_cpas_unregister_client(soc_private->cpas_handle[0]);

	if (rc)

		CAM_ERR(CAM_ISP, "CPAS0 unregistration failed rc=%d", rc);



	if (!rc && soc_private->cpas_version == CAM_CPAS_TITAN_175_V120)

		rc = cam_cpas_unregister_client(soc_private->cpas_handle[1]);

	rc = cam_cpas_unregister_client(soc_private->cpas_handle);

	if (rc)

		CAM_ERR(CAM_ISP, "CPAS1 unregistration failed rc=%d",

			rc);

		CAM_ERR(CAM_ISP, "CPAS unregistration failed rc=%d", rc);



	rc = cam_vfe_release_platform_resource(soc_info);

	if (rc < 0)
@@ -270,18 +234,9 @@ int cam_vfe_enable_soc_resources(struct cam_hw_soc_info *soc_info) 
	axi_vote.compressed_bw   = 10640000000L;

	axi_vote.uncompressed_bw = 10640000000L;



	rc = cam_cpas_start(soc_private->cpas_handle[0], &ahb_vote, &axi_vote);

	if (rc) {

		CAM_ERR(CAM_ISP, "Error! CPAS0 start failed rc=%d", rc);

		rc = -EFAULT;

		goto end;

	}



	if (!rc && soc_private->cpas_version == CAM_CPAS_TITAN_175_V120)

		rc = cam_cpas_start(soc_private->cpas_handle[1], &ahb_vote,

			&axi_vote);

	rc = cam_cpas_start(soc_private->cpas_handle, &ahb_vote, &axi_vote);

	if (rc) {

		CAM_ERR(CAM_ISP, "Error! CPAS1 start failed rc=%d", rc);

		CAM_ERR(CAM_ISP, "Error! CPAS start failed rc=%d", rc);

		rc = -EFAULT;

		goto end;

	}
@@ -296,9 +251,7 @@ int cam_vfe_enable_soc_resources(struct cam_hw_soc_info *soc_info) 
	return rc;



stop_cpas:

	cam_cpas_stop(soc_private->cpas_handle[0]);

	if (soc_private->cpas_version == CAM_CPAS_TITAN_175_V120)

		cam_cpas_stop(soc_private->cpas_handle[1]);

	cam_cpas_stop(soc_private->cpas_handle);

end:

	return rc;

}
@@ -370,14 +323,7 @@ int cam_vfe_disable_soc_resources(struct cam_hw_soc_info *soc_info) 
		return rc;

	}



	rc = cam_cpas_stop(soc_private->cpas_handle[0]);

	if (rc) {

		CAM_ERR(CAM_ISP, "Error! CPAS stop failed rc=%d", rc);

		return rc;

	}



	if (!rc && soc_private->cpas_version == CAM_CPAS_TITAN_175_V120)

		rc = cam_cpas_stop(soc_private->cpas_handle[1]);

	rc = cam_cpas_stop(soc_private->cpas_handle);

	if (rc) {

		CAM_ERR(CAM_ISP, "Error! CPAS stop failed rc=%d", rc);

		return rc;

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_soc.h

+1 −7
Original line number Diff line number Diff line
@@ -13,12 +13,6 @@ 


#define UBWC_STATIC_CONFIG_MAX 2



enum cam_cpas_handle_id {

	CAM_CPAS_HANDLE_CAMIF,

	CAM_CPAS_HANDLE_RAW,

	CAM_CPAS_HANDLE_MAX,

};



/*

 * struct cam_vfe_soc_private:

 *
@@ -31,7 +25,7 @@ enum cam_cpas_handle_id { 
 * @ubwc_static_ctrl:        UBWC static control configuration

 */

struct cam_vfe_soc_private {

	uint32_t    cpas_handle[CAM_CPAS_HANDLE_MAX];

	uint32_t    cpas_handle;

	uint32_t    cpas_version;

	struct clk *dsp_clk;

	int32_t     dsp_clk_index;

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver2.c

+5 −5
Original line number Diff line number Diff line
@@ -553,26 +553,26 @@ static int cam_vfe_camif_reg_dump_bh( 


	soc_private = camif_priv->soc_info->soc_private;

	if (soc_private->cpas_version == CAM_CPAS_TITAN_175_V120) {

		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x3A20, true, &val);

		CAM_DBG(CAM_ISP, "IFE0_nRDI_MAXWR_LOW offset 0x3A20 val 0x%x",

			val);



		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x5420, true, &val);

		CAM_DBG(CAM_ISP, "IFE1_nRDI_MAXWR_LOW offset 0x5420 val 0x%x",

			val);



		cam_cpas_reg_read(soc_private->cpas_handle[1],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x3620, true, &val);

		CAM_DBG(CAM_ISP,

			"IFE0123_RDI_WR_MAXWR_LOW offset 0x3620 val 0x%x", val);

	} else {

		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x420, true, &val);

		CAM_DBG(CAM_ISP, "IFE02_MAXWR_LOW offset 0x420 val 0x%x", val);



		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x820, true, &val);

		CAM_DBG(CAM_ISP, "IFE13_MAXWR_LOW offset 0x820 val 0x%x", val);

	}

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver3.c

+5 −5
Original line number Diff line number Diff line
@@ -607,26 +607,26 @@ static int cam_vfe_camif_ver3_reg_dump_bh( 


	soc_private = camif_priv->soc_info->soc_private;

	if (soc_private->cpas_version == CAM_CPAS_TITAN_175_V120) {

		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x3A20, true, &val);

		CAM_DBG(CAM_ISP, "IFE0_nRDI_MAXWR_LOW offset 0x3A20 val 0x%x",

			val);



		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x5420, true, &val);

		CAM_DBG(CAM_ISP, "IFE1_nRDI_MAXWR_LOW offset 0x5420 val 0x%x",

			val);



		cam_cpas_reg_read(soc_private->cpas_handle[1],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x3620, true, &val);

		CAM_DBG(CAM_ISP,

			"IFE0123_RDI_WR_MAXWR_LOW offset 0x3620 val 0x%x", val);

	} else {

		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x420, true, &val);

		CAM_DBG(CAM_ISP, "IFE02_MAXWR_LOW offset 0x420 val 0x%x", val);



		cam_cpas_reg_read(soc_private->cpas_handle[0],

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x820, true, &val);

		CAM_DBG(CAM_ISP, "IFE13_MAXWR_LOW offset 0x820 val 0x%x", val);

	}

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_fe_ver1.c

+2 −2
Original line number Diff line number Diff line
@@ -381,11 +381,11 @@ static int cam_vfe_fe_reg_dump( 
		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	cam_cpas_reg_read(soc_private->cpas_handle[0],

	cam_cpas_reg_read(soc_private->cpas_handle,

		CAM_CPAS_REG_CAMNOC, 0x420, true, &val);

	CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x420 val 0x%x", val);



	cam_cpas_reg_read(soc_private->cpas_handle[0],

	cam_cpas_reg_read(soc_private->cpas_handle,

		CAM_CPAS_REG_CAMNOC, 0x820, true, &val);

	CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x820 val 0x%x", val);