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Commit 98e990af authored by Linus Torvalds's avatar Linus Torvalds
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USB: revert a powerpc EHCI patch

There is just one patch in here, a revert of a powerpc EHCI driver
patch that was reported to cause problems.

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>

* tag 'usb-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  Revert "powerpc/usb: fix issue of CPU halt when missing USB PHY clock"
parents 75d7b398 71919403
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+2 −9
Original line number Original line Diff line number Diff line
@@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
}
}


static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
{
{
	struct usb_hcd *hcd = ehci_to_hcd(ehci);
	struct usb_hcd *hcd = ehci_to_hcd(ehci);
	struct fsl_usb2_platform_data *pdata;
	struct fsl_usb2_platform_data *pdata;
@@ -299,19 +299,12 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
#endif
#endif
		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
	}
	}

	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
		return -ENODEV;
	}
	return 0;
}
}


/* called after powerup, by probe or system-pm "wakeup" */
/* called after powerup, by probe or system-pm "wakeup" */
static int ehci_fsl_reinit(struct ehci_hcd *ehci)
static int ehci_fsl_reinit(struct ehci_hcd *ehci)
{
{
	if (ehci_fsl_usb_setup(ehci))
	ehci_fsl_usb_setup(ehci);
		return -ENODEV;
	ehci_port_power(ehci, 0);
	ehci_port_power(ehci, 0);


	return 0;
	return 0;
+0 −1
Original line number Original line Diff line number Diff line
@@ -45,6 +45,5 @@
#define FSL_SOC_USB_PRICTRL	0x40c	/* NOTE: big-endian */
#define FSL_SOC_USB_PRICTRL	0x40c	/* NOTE: big-endian */
#define FSL_SOC_USB_SICTRL	0x410	/* NOTE: big-endian */
#define FSL_SOC_USB_SICTRL	0x410	/* NOTE: big-endian */
#define FSL_SOC_USB_CTRL	0x500	/* NOTE: big-endian */
#define FSL_SOC_USB_CTRL	0x500	/* NOTE: big-endian */
#define CTRL_PHY_CLK_VALID	(1 << 17)
#define SNOOP_SIZE_2GB		0x1e
#define SNOOP_SIZE_2GB		0x1e
#endif				/* _EHCI_FSL_H */
#endif				/* _EHCI_FSL_H */