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Commit 98cc4544 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: dts: Add support for more than 2GB of memory for omap5 



Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec
("ARM: dts: DRA7: change address-cells and size-cells").

Acked-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 0af28cc9

arch/arm/boot/dts/omap5-cm-t54.dts

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 


	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x7F000000>; /* 2048 MB */

		reg = <0 0x80000000 0 0x7f000000>; /* 2048 MB */

	};



	aliases {

arch/arm/boot/dts/omap5-igep0050.dts

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 


	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x7f000000>; /* 2032 MB */

		reg = <0x0 0x80000000 0 0x7f000000>;	/* 2032 MB */

	};



	gpio_keys {

arch/arm/boot/dts/omap5-uevm.dts

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ 


	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x7F000000>; /* 2032 MB */

		reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */

	};



	leds {

arch/arm/boot/dts/omap5.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -12,8 +12,8 @@ 
#include <dt-bindings/pinctrl/omap.h>



/ {

	#address-cells = <1>;

	#size-cells = <1>;

	#address-cells = <2>;

	#size-cells = <2>;



	compatible = "ti,omap5";

	interrupt-parent = <&wakeupgen>;
@@ -90,10 +90,10 @@ 
		compatible = "arm,cortex-a15-gic";

		interrupt-controller;

		#interrupt-cells = <3>;

		reg = <0x48211000 0x1000>,

		      <0x48212000 0x1000>,

		      <0x48214000 0x2000>,

		      <0x48216000 0x2000>;

		reg = <0 0x48211000 0 0x1000>,

		      <0 0x48212000 0 0x1000>,

		      <0 0x48214000 0 0x2000>,

		      <0 0x48216000 0 0x2000>;

		interrupt-parent = <&gic>;

	};
@@ -101,7 +101,7 @@ 
		compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";

		interrupt-controller;

		#interrupt-cells = <3>;

		reg = <0x48281000 0x1000>;

		reg = <0 0x48281000 0 0x1000>;

		interrupt-parent = <&gic>;

	};
@@ -129,11 +129,11 @@ 
		compatible = "ti,omap5-l3-noc", "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		ranges = <0 0 0 0xc0000000>;

		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";

		reg = <0x44000000 0x2000>,

		      <0x44800000 0x3000>,

		      <0x45000000 0x4000>;

		reg = <0 0x44000000 0 0x2000>,

		      <0 0x44800000 0 0x3000>,

		      <0 0x45000000 0 0x4000>;

		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;