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Commit 9862e600 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/debugfs: Show the per-ring IMR 



Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 0f46832f

drivers/gpu/drm/i915/i915_debugfs.c

+7 −1
Original line number Diff line number Diff line
@@ -456,8 +456,14 @@ static int i915_interrupt_info(struct seq_file *m, void *data) 
	}

	seq_printf(m, "Interrupts received: %d\n",

		   atomic_read(&dev_priv->irq_received));

	for (i = 0; i < I915_NUM_RINGS; i++)

	for (i = 0; i < I915_NUM_RINGS; i++) {

		if (IS_GEN6(dev)) {

			seq_printf(m, "Graphics Interrupt mask (%s):	%08x\n",

				   dev_priv->ring[i].name,

				   I915_READ_IMR(&dev_priv->ring[i]));

		}

		i915_ring_seqno_info(m, &dev_priv->ring[i]);

	}

	mutex_unlock(&dev->struct_mutex);



	return 0;

drivers/gpu/drm/i915/i915_irq.c

+4 −1
Original line number Diff line number Diff line
@@ -349,9 +349,12 @@ static void notify_ring(struct drm_device *dev, 
{

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 seqno = ring->get_seqno(ring);

	ring->irq_seqno = seqno;



	trace_i915_gem_request_complete(dev, seqno);



	ring->irq_seqno = seqno;

	wake_up_all(&ring->irq_queue);



	dev_priv->hangcheck_count = 0;

	mod_timer(&dev_priv->hangcheck_timer,

		  jiffies + msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD));

drivers/gpu/drm/i915/intel_ringbuffer.h

+13 −12
Original line number Diff line number Diff line
@@ -16,23 +16,24 @@ struct intel_hw_status_page { 


#define I915_RING_READ(reg) i915_safe_read(dev_priv, reg)



#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL(ring->mmio_base))

#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)

#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base))

#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val)



#define I915_READ_START(ring) I915_RING_READ(RING_START(ring->mmio_base))

#define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)

#define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base))

#define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val)



#define I915_READ_HEAD(ring)  I915_RING_READ(RING_HEAD(ring->mmio_base))

#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)

#define I915_READ_HEAD(ring)  I915_RING_READ(RING_HEAD((ring)->mmio_base))

#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val)



#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL(ring->mmio_base))

#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)

#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base))

#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val)



#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR(ring->mmio_base), val)

#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)

#define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base))



#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID(ring->mmio_base))

#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0(ring->mmio_base))

#define I915_READ_SYNC_1(ring) I915_RING_READ(RING_SYNC_1(ring->mmio_base))

#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base))

#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))

#define I915_READ_SYNC_1(ring) I915_RING_READ(RING_SYNC_1((ring)->mmio_base))



struct  intel_ring_buffer {

	const char	*name;