Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9824cf73 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

clk: Add a function to retrieve phase 



The current phase API doesn't look into the actual hardware to get the phase
value, but will rather get it from a variable only set by the set_phase
function.

This will cause issue when the client driver will never call the set_phase
function, where we can end up having a reported phase that will not match what
the hardware has been programmed to by the bootloader or what phase is
programmed out of reset.

Add a new get_phase function for the drivers to implement so that we can get
this value.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
parent 355bb165

drivers/clk/clk.c

+10 −0
Original line number Original line Diff line number Diff line
@@ -1933,6 +1933,16 @@ int __clk_init(struct device *dev, struct clk *clk) 
	else

	else

		clk->accuracy = 0;

		clk->accuracy = 0;





	/*

	 * Set clk's phase.

	 * Since a phase is by definition relative to its parent, just

	 * query the current clock phase, or just assume it's in phase.

	 */

	if (clk->ops->get_phase)

		clk->phase = clk->ops->get_phase(clk->hw);

	else

		clk->phase = 0;



	/*

	/*

	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For

	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For

	 * simple clocks and lazy developers the default fallback is to use the

	 * simple clocks and lazy developers the default fallback is to use the

include/linux/clk-provider.h

+5 −0
Original line number Original line Diff line number Diff line
@@ -130,6 +130,10 @@ struct dentry; 
 *		set then clock accuracy will be initialized to parent accuracy

 *		set then clock accuracy will be initialized to parent accuracy

 *		or 0 (perfect clock) if clock has no parent.

 *		or 0 (perfect clock) if clock has no parent.

 *

 *

 * @get_phase:	Queries the hardware to get the current phase of a clock.

 *		Returned values are 0-359 degrees on success, negative

 *		error codes on failure.

 *

 * @set_phase:	Shift the phase this clock signal in degrees specified

 * @set_phase:	Shift the phase this clock signal in degrees specified

 *		by the second argument. Valid values for degrees are

 *		by the second argument. Valid values for degrees are

 *		0-359. Return 0 on success, otherwise -EERROR.

 *		0-359. Return 0 on success, otherwise -EERROR.
@@ -182,6 +186,7 @@ struct clk_ops { 
				    unsigned long parent_rate, u8 index);

				    unsigned long parent_rate, u8 index);

	unsigned long	(*recalc_accuracy)(struct clk_hw *hw,

	unsigned long	(*recalc_accuracy)(struct clk_hw *hw,

					   unsigned long parent_accuracy);

					   unsigned long parent_accuracy);

	int		(*get_phase)(struct clk_hw *hw);

	int		(*set_phase)(struct clk_hw *hw, int degrees);

	int		(*set_phase)(struct clk_hw *hw, int degrees);

	void		(*init)(struct clk_hw *hw);

	void		(*init)(struct clk_hw *hw);

	int		(*debug_init)(struct clk_hw *hw, struct dentry *dentry);

	int		(*debug_init)(struct clk_hw *hw, struct dentry *dentry);