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Unverified Commit 97fe8e5a authored by hmtheboy154's avatar hmtheboy154
Browse files

Merge commit '18144faf' into lineage-22.2

parents c1aa575a 18144faf

Documentation/sphinx/kernel_include.py

+0 −1
Original line number Diff line number Diff line
@@ -94,7 +94,6 @@ class KernelInclude(Include): 
        # HINT: this is the only line I had to change / commented out:

        #path = utils.relative_path(None, path)



        path = nodes.reprunicode(path)

        encoding = self.options.get(

            'encoding', self.state.document.settings.input_encoding)

        e_handler=self.state.document.settings.input_encoding_error_handler

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 19

SUBLEVEL = 312

SUBLEVEL = 315

EXTRAVERSION =

NAME = "People's Front"

arch/alpha/kernel/osf_sys.c

+1 −1
Original line number Diff line number Diff line
@@ -964,7 +964,7 @@ put_tv32(struct timeval32 __user *o, struct timespec64 *i) 
}



static inline long

put_tv_to_tv32(struct timeval32 __user *o, struct __kernel_old_timeval *i)

put_tv_to_tv32(struct timeval32 __user *o, struct timeval *i)

{

	return copy_to_user(o, &(struct timeval32){

				.tv_sec = i->tv_sec,

arch/arc/boot/dts/hsdk.dts

+0 −1
Original line number Diff line number Diff line
@@ -170,7 +170,6 @@ 
		};



		gmac: ethernet@8000 {

			#interrupt-cells = <1>;

			compatible = "snps,dwmac";

			reg = <0x8000 0x2000>;

			interrupts = <10>;

arch/arm64/boot/dts/mediatek/mt7622.dtsi

+2 −5
Original line number Diff line number Diff line
@@ -232,7 +232,7 @@ 
		clock-names = "hif_sel";

	};



	cir: cir@10009000 {

	cir: ir-receiver@10009000 {

		compatible = "mediatek,mt7622-cir";

		reg = <0 0x10009000 0 0x1000>;

		interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>;
@@ -459,7 +459,6 @@ 
			 <&pericfg CLK_PERI_AUXADC_PD>;

		clock-names = "therm", "auxadc";

		resets = <&pericfg MT7622_PERI_THERM_SW_RST>;

		reset-names = "therm";

		mediatek,auxadc = <&auxadc>;

		mediatek,apmixedsys = <&apmixedsys>;

		nvmem-cells = <&thermal_calibration>;
@@ -846,9 +845,7 @@ 
	};



	eth: ethernet@1b100000 {

		compatible = "mediatek,mt7622-eth",

			     "mediatek,mt2701-eth",

			     "syscon";

		compatible = "mediatek,mt7622-eth";

		reg = <0 0x1b100000 0 0x20000>;

		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>,