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Commit 97407b63 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: use 256 bit buffers for all wb allocations (v2)



May waste a bit of memory, but simplifies the interface
significantly.

v2: convert internal accounting to use 256bit slots

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b7cecbe8
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+0 −4
Original line number Diff line number Diff line
@@ -1131,10 +1131,6 @@ struct amdgpu_wb {

int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb);
int amdgpu_wb_get_256bit(struct amdgpu_device *adev, u32 *wb);
void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb);
void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb);

void amdgpu_get_pcie_info(struct amdgpu_device *adev);

+4 −73
Original line number Diff line number Diff line
@@ -504,7 +504,8 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
	int r;

	if (adev->wb.wb_obj == NULL) {
		r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t),
		/* AMDGPU_MAX_WB * sizeof(uint32_t) * 8 = AMDGPU_MAX_WB 256bit slots */
		r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t) * 8,
					    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
					    &adev->wb.wb_obj, &adev->wb.gpu_addr,
					    (void **)&adev->wb.wb);
@@ -535,47 +536,10 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb)
{
	unsigned long offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb);
	if (offset < adev->wb.num_wb) {
		__set_bit(offset, adev->wb.used);
		*wb = offset;
		return 0;
	} else {
		return -EINVAL;
	}
}

/**
 * amdgpu_wb_get_64bit - Allocate a wb entry
 *
 * @adev: amdgpu_device pointer
 * @wb: wb index
 *
 * Allocate a wb slot for use by the driver (all asics).
 * Returns 0 on success or -EINVAL on failure.
 */
int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb)
{
	unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
				adev->wb.num_wb, 0, 2, 7, 0);
	if ((offset + 1) < adev->wb.num_wb) {
	if (offset < adev->wb.num_wb) {
		__set_bit(offset, adev->wb.used);
		__set_bit(offset + 1, adev->wb.used);
		*wb = offset;
		return 0;
	} else {
		return -EINVAL;
	}
}

int amdgpu_wb_get_256bit(struct amdgpu_device *adev, u32 *wb)
{
	int i = 0;
	unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
				adev->wb.num_wb, 0, 8, 63, 0);
	if ((offset + 7) < adev->wb.num_wb) {
		for (i = 0; i < 8; i++)
			__set_bit(offset + i, adev->wb.used);
		*wb = offset;
		*wb = offset * 8; /* convert to dw offset */
		return 0;
	} else {
		return -EINVAL;
@@ -596,39 +560,6 @@ void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb)
		__clear_bit(wb, adev->wb.used);
}

/**
 * amdgpu_wb_free_64bit - Free a wb entry
 *
 * @adev: amdgpu_device pointer
 * @wb: wb index
 *
 * Free a wb slot allocated for use by the driver (all asics)
 */
void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb)
{
	if ((wb + 1) < adev->wb.num_wb) {
		__clear_bit(wb, adev->wb.used);
		__clear_bit(wb + 1, adev->wb.used);
	}
}

/**
 * amdgpu_wb_free_256bit - Free a wb entry
 *
 * @adev: amdgpu_device pointer
 * @wb: wb index
 *
 * Free a wb slot allocated for use by the driver (all asics)
 */
void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb)
{
	int i = 0;

	if ((wb + 7) < adev->wb.num_wb)
		for (i = 0; i < 8; i++)
			__clear_bit(wb + i, adev->wb.used);
}

/**
 * amdgpu_vram_location - try to find VRAM location
 * @adev: amdgpu device structure holding all necessary informations
+16 −49
Original line number Diff line number Diff line
@@ -184,20 +184,6 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
			return r;
	}

	if (ring->funcs->support_64bit_ptrs) {
		r = amdgpu_wb_get_64bit(adev, &ring->rptr_offs);
		if (r) {
			dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);
			return r;
		}

		r = amdgpu_wb_get_64bit(adev, &ring->wptr_offs);
		if (r) {
			dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r);
			return r;
		}

	} else {
	r = amdgpu_wb_get(adev, &ring->rptr_offs);
	if (r) {
		dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);
@@ -210,22 +196,11 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
		return r;
	}

	}

	if (amdgpu_sriov_vf(adev) && ring->funcs->type == AMDGPU_RING_TYPE_GFX) {
		r = amdgpu_wb_get_256bit(adev, &ring->fence_offs);
		if (r) {
			dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
			return r;
		}

	} else {
	r = amdgpu_wb_get(adev, &ring->fence_offs);
	if (r) {
		dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
		return r;
	}
	}

	r = amdgpu_wb_get(adev, &ring->cond_exe_offs);
	if (r) {
@@ -286,18 +261,10 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)
{
	ring->ready = false;

	if (ring->funcs->support_64bit_ptrs) {
		amdgpu_wb_free_64bit(ring->adev, ring->rptr_offs);
		amdgpu_wb_free_64bit(ring->adev, ring->wptr_offs);
	} else {
	amdgpu_wb_free(ring->adev, ring->rptr_offs);
	amdgpu_wb_free(ring->adev, ring->wptr_offs);
	}

	amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
	if (amdgpu_sriov_vf(ring->adev) && ring->funcs->type == AMDGPU_RING_TYPE_GFX)
		amdgpu_wb_free_256bit(ring->adev, ring->fence_offs);
	else
	amdgpu_wb_free(ring->adev, ring->fence_offs);

	amdgpu_bo_free_kernel(&ring->ring_obj,