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Commit 96dca4c2 authored by Artem Bityutskiy's avatar Artem Bityutskiy Committed by David Woodhouse
Browse files

mtd: nand: remove NAND_NO_PADDING macro 



It is not used anywhere.

Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: default avatarBrian Norris <computersforpeace@gmail.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent 0be718e5

include/linux/mtd/nand.h

+1 −5
Original line number Original line Diff line number Diff line
@@ -145,8 +145,6 @@ typedef enum { 
 */

 */

/* Buswidth is 16 bit */

/* Buswidth is 16 bit */

#define NAND_BUSWIDTH_16	0x00000002

#define NAND_BUSWIDTH_16	0x00000002

/* Device supports partial programming without padding */

#define NAND_NO_PADDING		0x00000004

/* Chip has cache program function */

/* Chip has cache program function */

#define NAND_CACHEPRG		0x00000008

#define NAND_CACHEPRG		0x00000008

/* Chip has copy back function */

/* Chip has copy back function */
@@ -171,11 +169,9 @@ typedef enum { 
#define NAND_SUBPAGE_READ	0x00001000

#define NAND_SUBPAGE_READ	0x00001000





/* Options valid for Samsung large page devices */

/* Options valid for Samsung large page devices */

#define NAND_SAMSUNG_LP_OPTIONS \

#define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG | NAND_COPYBACK)

	(NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)





/* Macros to identify the above */

/* Macros to identify the above */

#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))

#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))

#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))

#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))

#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))

#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))

#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))