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Commit 96d92388 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: Add dppclk to dcn_bw_clocks

parent bce14857
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+2 −1
Original line number Diff line number Diff line
@@ -582,7 +582,8 @@ struct dce_hwseq_registers {
	type DOMAIN7_PGFSM_PWR_STATUS; \
	type DCFCLK_GATE_DIS; \
	type DCHUBBUB_GLOBAL_TIMER_REFDIV; \
	type DENTIST_DPPCLK_WDIVIDER;
	type DENTIST_DPPCLK_WDIVIDER; \
	type DENTIST_DISPCLK_WDIVIDER;

struct dce_hwseq_shift {
	HWSEQ_REG_FIELD_LIST(uint8_t)
+0 −1
Original line number Diff line number Diff line
@@ -1335,7 +1335,6 @@ static void dcn10_enable_plane(
	/* make sure OPP_PIPE_CLOCK_EN = 1 */
	REG_UPDATE(OPP_PIPE_CONTROL[pipe_ctx->stream_res.tg->inst],
			OPP_PIPE_CLOCK_EN, 1);
	/*TODO: REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_WDIVIDER, 0x1f);*/

/* TODO: enable/disable in dm as per update type.
	if (plane_state) {
+1 −0
Original line number Diff line number Diff line
@@ -241,6 +241,7 @@ struct dce_bw_output {

struct dcn_bw_clocks {
	int dispclk_khz;
	int dppclk_khz;
	bool dppclk_div;
	int dcfclk_khz;
	int dcfclk_deep_sleep_khz;