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Commit 968c61f7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MFD updates from Lee Jones:
 "New Drivers
   - RK805 Power Management IC (PMIC)
   - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
   - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs

  New Device Support:
   - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
   - Add support for X-Powers AXP806 to axp20x
   - Add support for X-Powers AXP813 to axp20x
   - Add support for Intel Sunrise Point LPSS to intel-lpss-pci

  New Functionality:
   - Amend API to provide register layout; atmel-smc

  Fix-ups:
   - DT re-work; omap, nokia
   - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
   - Fix chip ID formatting issue(s); rk808
   - Optionally register touchscreen devices; da9052-core
   - Documentation improvements; twl-core
   - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
   - Drop unnecessary static declaration; max8925-i2c
   - Kconfig changes (missing deps and remove module support)
   - Slim down oversized licence statement; hi6421-pmic-core
   - Use managed resources (devm_*); lp87565
   - Supply proper error checking/handling; t7l66xb

  Bug Fixes:
   - Fix counter duplication issue; da9052-core
   - Fix potential NULL deference issue; max8998
   - Leave SPI-NOR write-protection bit alone; lpc_ich
   - Ensure device is put into reset during suspend; intel-lpss
   - Correct register offset variable size; omap-usb-tll"

* tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits)
  mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants
  mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
  dt-bindings: mfd: Add bindings for ZII RAVE devices
  mfd: omap-usb-tll: Fix register offsets
  mfd: da9052: Constify spi_device_id
  mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
  mfd: da9055: Constify i2c_device_id
  mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices
  mfd: t7l66xb: Handle return value of clk_prepare_enable
  mfd: Add ROHM BD9571MWV-M PMIC DT bindings
  mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool
  mfd: lp87565: Convert to use devm_mfd_add_devices()
  mfd: Add support for TPS68470 device
  mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell
  mfd: syscon: atmel-smc: Add helper to retrieve register layout
  mfd: axp20x: Use correct platform device ID for many PEK
  dt-bindings: mfd: axp20x: Introduce bindings for AXP813
  mfd: axp20x: Add support for AXP813 PMIC
  dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips
  mfd: Add ROHM BD9571MWV-M MFD PMIC driver
  ...
parents 9d71941d b01e9348
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What:		/sys/bus/iio/devices/iio:deviceX/in_count0_preset
KernelVersion:	4.13
Contact:	fabrice.gasnier@st.com
Description:
		Reading returns the current preset value. Writing sets the
		preset value. Encoder counts continuously from 0 to preset
		value, depending on direction (up/down).

What:		/sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
KernelVersion:	4.13
Contact:	fabrice.gasnier@st.com
Description:
		Reading returns the list possible quadrature modes.

What:		/sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
KernelVersion:	4.13
Contact:	fabrice.gasnier@st.com
Description:
		Configure the device counter quadrature modes:
		- non-quadrature:
			Encoder IN1 input servers as the count input (up
			direction).
		- quadrature:
			Encoder IN1 and IN2 inputs are mixed to get direction
			and count.

What:		/sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
KernelVersion:	4.13
Contact:	fabrice.gasnier@st.com
Description:
		Reading returns the list possible active edges.

What:		/sys/bus/iio/devices/iio:deviceX/in_count0_polarity
KernelVersion:	4.13
Contact:	fabrice.gasnier@st.com
Description:
		Configure the device encoder/counter active edge:
		- rising-edge
		- falling-edge
		- both-edges

		In non-quadrature mode, device counts up on active edge.
		In quadrature mode, encoder counting scenarios are as follows:
		----------------------------------------------------------------
		| Active  | Level on |      IN1 signal    |     IN2 signal     |
		| edge    | opposite |------------------------------------------
		|         | signal   |  Rising  | Falling |  Rising  | Falling |
		----------------------------------------------------------------
		| Rising  | High ->  |   Down   |    -    |    Up    |    -    |
		| edge    | Low  ->  |    Up    |    -    |   Down   |    -    |
		----------------------------------------------------------------
		| Falling | High ->  |    -     |    Up   |    -     |   Down  |
		| edge    | Low  ->  |    -     |   Down  |    -     |    Up   |
		----------------------------------------------------------------
		| Both    | High ->  |   Down   |    Up   |    Up    |   Down  |
		| edges   | Low  ->  |    Up    |   Down  |   Down   |    Up   |
		----------------------------------------------------------------
+2 −2
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@@ -20,8 +20,8 @@ i2c@0 {
	#address-cells = <1>;
	#size-cells = <0>;

	retu-mfd: retu@1 {
		compatible = "retu-mfd";
	retu: retu@1 {
		compatible = "nokia,retu";
		reg = <0x1>;
	};
};
+27 −0
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STMicroelectronics STM32 Low-Power Timer quadrature encoder and counter

STM32 Low-Power Timer provides several counter modes. It can be used as:
- quadrature encoder to detect angular position and direction of rotary
  elements, from IN1 and IN2 input signals.
- simple counter from IN1 input signal.

Must be a sub-node of an STM32 Low-Power Timer device tree node.
See ../mfd/stm32-lptimer.txt for details about the parent node.

Required properties:
- compatible:		Must be "st,stm32-lptimer-counter".
- pinctrl-names: 	Set to "default".
- pinctrl-0: 		List of phandles pointing to pin configuration nodes,
			to set IN1/IN2 pins in mode of operation for Low-Power
			Timer input on external pin.

Example:
	timer@40002400 {
		compatible = "st,stm32-lptimer";
		...
		counter {
			compatible = "st,stm32-lptimer-counter";
			pinctrl-names = "default";
			pinctrl-0 = <&lptim1_in_pins>;
		};
	};
+23 −0
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STMicroelectronics STM32 Low-Power Timer Trigger

STM32 Low-Power Timer provides trigger source (LPTIM output) that can be used
by STM32 internal ADC and/or DAC.

Must be a sub-node of an STM32 Low-Power Timer device tree node.
See ../mfd/stm32-lptimer.txt for details about the parent node.

Required properties:
- compatible:		Must be "st,stm32-lptimer-trigger".
- reg:			Identify trigger hardware block. Must be 0, 1 or 2
			respectively for lptimer1, lptimer2 or lptimer3
			trigger output.

Example:
	timer@40002400 {
		compatible = "st,stm32-lptimer";
		...
		trigger@0 {
			compatible = "st,stm32-lptimer-trigger";
			reg = <0>;
		};
	};
+1 −0
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@@ -8,6 +8,7 @@ Required properties:
- compatible:		Should be one of the following
			"atmel,at91sam9260-smc", "syscon"
			"atmel,sama5d3-smc", "syscon"
			"atmel,sama5d2-smc", "syscon"
- reg:			Contains offset/length value of the SMC memory
			region.

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