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Commit 95d6791b authored by Yauhen Kharuzhy's avatar Yauhen Kharuzhy Committed by Kukjin Kim
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ARM: S3C24XX: Add address map and clock definitions for HSMMC0 



Define maps for HSMMC devices.

S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.

So suppose that S3C2443 has only HSMMC1.

Define clock for hsmmc0 device and register it.

Signed-off-by: default avatarYauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 387c31c7

arch/arm/mach-s3c2410/include/mach/irqs.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -152,8 +152,8 @@ 




#define IRQ_S3C2416_HSMMC0	S3C2410_IRQ(21)		/* S3C2416/S3C2450 */

#define IRQ_S3C2416_HSMMC0	S3C2410_IRQ(21)		/* S3C2416/S3C2450 */





#define IRQ_HSMMC0		IRQ_S3C2443_HSMMC

#define IRQ_HSMMC0		IRQ_S3C2416_HSMMC0

#define IRQ_HSMMC1		IRQ_S3C2416_HSMMC0

#define IRQ_HSMMC1		IRQ_S3C2443_HSMMC





#define IRQ_S3C2443_LCD1	S3C2410_IRQSUB(14)

#define IRQ_S3C2443_LCD1	S3C2410_IRQSUB(14)

#define IRQ_S3C2443_LCD2	S3C2410_IRQSUB(15)

#define IRQ_S3C2443_LCD2	S3C2410_IRQSUB(15)

arch/arm/mach-s3c2410/include/mach/map.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -112,8 +112,8 @@ 
#define S3C_PA_IIC          S3C2410_PA_IIC

#define S3C_PA_IIC          S3C2410_PA_IIC

#define S3C_PA_UART	    S3C24XX_PA_UART

#define S3C_PA_UART	    S3C24XX_PA_UART

#define S3C_PA_USBHOST	S3C2410_PA_USBHOST

#define S3C_PA_USBHOST	S3C2410_PA_USBHOST

#define S3C_PA_HSMMC0	    S3C2443_PA_HSMMC

#define S3C_PA_HSMMC0	    S3C2416_PA_HSMMC0

#define S3C_PA_HSMMC1	    S3C2416_PA_HSMMC0

#define S3C_PA_HSMMC1	    S3C2443_PA_HSMMC

#define S3C_PA_WDT	    S3C2410_PA_WATCHDOG

#define S3C_PA_WDT	    S3C2410_PA_WATCHDOG

#define S3C_PA_NAND	    S3C24XX_PA_NAND

#define S3C_PA_NAND	    S3C24XX_PA_NAND

arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -86,6 +86,7 @@ 
#define S3C2443_HCLKCON_LCDC		(1<<9)

#define S3C2443_HCLKCON_LCDC		(1<<9)

#define S3C2443_HCLKCON_USBH		(1<<11)

#define S3C2443_HCLKCON_USBH		(1<<11)

#define S3C2443_HCLKCON_USBD		(1<<12)

#define S3C2443_HCLKCON_USBD		(1<<12)

#define S3C2416_HCLKCON_HSMMC0		(1<<15)

#define S3C2443_HCLKCON_HSMMC		(1<<16)

#define S3C2443_HCLKCON_HSMMC		(1<<16)

#define S3C2443_HCLKCON_CFC		(1<<17)

#define S3C2443_HCLKCON_CFC		(1<<17)

#define S3C2443_HCLKCON_SSMC		(1<<18)

#define S3C2443_HCLKCON_SSMC		(1<<18)

arch/arm/mach-s3c2416/clock.c

+13 −5
Original line number Original line Diff line number Diff line
@@ -38,12 +38,11 @@ static unsigned int armdiv[8] = { 
	[7] = 8,

	[7] = 8,

};

};





/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */

static struct clksrc_clk hsmmc_div[] = {

static struct clksrc_clk hsmmc_div[] = {

	[0] = {

	[0] = {

		.clk = {

		.clk = {

			.name	= "hsmmc-div",

			.name	= "hsmmc-div",

			.id	= 1,

			.id	= 0,

			.parent	= &clk_esysclk.clk,

			.parent	= &clk_esysclk.clk,

		},

		},

		.reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },

		.reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = { 
	[1] = {

	[1] = {

		.clk = {

		.clk = {

			.name	= "hsmmc-div",

			.name	= "hsmmc-div",

			.id	= 0,

			.id	= 1,

			.parent	= &clk_esysclk.clk,

			.parent	= &clk_esysclk.clk,

		},

		},

		.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },

		.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = { 
static struct clksrc_clk hsmmc_mux[] = {

static struct clksrc_clk hsmmc_mux[] = {

	[0] = {

	[0] = {

		.clk	= {

		.clk	= {

			.id	= 1,

			.id	= 0,

			.name	= "hsmmc-if",

			.name	= "hsmmc-if",

			.ctrlbit = (1 << 6),

			.ctrlbit = (1 << 6),

			.enable = s3c2443_clkcon_enable_s,

			.enable = s3c2443_clkcon_enable_s,
@@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = { 
	},

	},

	[1] = {

	[1] = {

		.clk	= {

		.clk	= {

			.id	= 0,

			.id	= 1,

			.name	= "hsmmc-if",

			.name	= "hsmmc-if",

			.ctrlbit = (1 << 12),

			.ctrlbit = (1 << 12),

			.enable = s3c2443_clkcon_enable_s,

			.enable = s3c2443_clkcon_enable_s,
@@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = { 
	},

	},

};

};





static struct clk hsmmc0_clk = {

	.name		= "hsmmc",

	.id		= 0,

	.parent		= &clk_h,

	.enable		= s3c2443_clkcon_enable_h,

	.ctrlbit	= S3C2416_HCLKCON_HSMMC0,

};





static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)

static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)

{

{
@@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal) 
	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)

	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)

		s3c_register_clksrc(clksrcs[ptr], 1);

		s3c_register_clksrc(clksrcs[ptr], 1);





	s3c24xx_register_clock(&hsmmc0_clk);



	s3c_pwmclk_init();

	s3c_pwmclk_init();





}
 
}

arch/arm/mach-s3c2443/Kconfig

+1 −1
Original line number Original line Diff line number Diff line
@@ -25,7 +25,7 @@ config MACH_SMDK2443 
	bool "SMDK2443"

	bool "SMDK2443"

	select CPU_S3C2443

	select CPU_S3C2443

	select MACH_SMDK

	select MACH_SMDK

	select S3C_DEV_HSMMC

	select S3C_DEV_HSMMC1

	help

	help

	  Say Y here if you are using an SMDK2443

	  Say Y here if you are using an SMDK2443