documentation: iommu: Add binding document of Exynos System MMU

Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)

Samsung's Exynos architecture contains System MMUs that enables scattered

physical memory chunks visible as a contiguous region to DMA-capable peripheral

devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.

System MMU is an IOMMU and supports identical translation table format to

ARMv7 translation tables with minimum set of page properties including access

permissions, shareability and security protection. In addition, System MMU has

another capabilities like L2 TLB or block-fetch buffers to minimize translation

latency.

System MMUs are in many to one relation with peripheral devices, i.e. single

peripheral device might have multiple System MMUs (usually one for each bus

master), but one System MMU can handle transactions from only one peripheral

device. The relation between a System MMU and the peripheral device needs to be

defined in device node of the peripheral device.

MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System

MMUs.

* MFC has one System MMU on its left and right bus.

* FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU

  for window 1, 2 and 3.

* M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and

  the other System MMU on the write channel.

The drivers must consider how to handle those System MMUs. One of the idea is

to implement child devices or sub-devices which are the client devices of the

System MMU.

Required properties:

- compatible: Should be "samsung,exynos-sysmmu"

- reg: A tuple of base address and size of System MMU registers.

- interrupt-parent: The phandle of the interrupt controller of System MMU

- interrupts: An interrupt specifier for interrupt signal of System MMU,

	      according to the format defined by a particular interrupt

	      controller.

- clock-names: Should be "sysmmu" if the System MMU is needed to gate its clock.

	       Optional "master" if the clock to the System MMU is gated by

	       another gate clock other than "sysmmu".

	       Exynos4 SoCs, there needs no "master" clock.

	       Exynos5 SoCs, some System MMUs must have "master" clocks.

- clocks: Required if the System MMU is needed to gate its clock.

- samsung,power-domain: Required if the System MMU is needed to gate its power.

	  Please refer to the following document:

	  Documentation/devicetree/bindings/arm/exynos/power_domain.txt

Examples:

	gsc_0: gsc@13e00000 {

		compatible = "samsung,exynos5-gsc";

		reg = <0x13e00000 0x1000>;

		interrupts = <0 85 0>;

		samsung,power-domain = <&pd_gsc>;

		clocks = <&clock CLK_GSCL0>;

		clock-names = "gscl";

	};

	sysmmu_gsc0: sysmmu@13E80000 {

		compatible = "samsung,exynos-sysmmu";

		reg = <0x13E80000 0x1000>;

		interrupt-parent = <&combiner>;

		interrupts = <2 0>;

		clock-names = "sysmmu", "master";

		clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;

		samsung,power-domain = <&pd_gsc>;

	};