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Commit 93b6bde3 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ASoC: msm: update quin tdm slot for single lane"

parents 3d3de958 4f941546

asoc/sa6155.c

+3 −4
Original line number Diff line number Diff line 
/* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -266,7 +266,7 @@ static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = { 
		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */

	},

	{ /* QUAT TDM */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 16}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
@@ -469,8 +469,7 @@ static unsigned int tdm_tx_slot_offset 
		{28, 0xFFFF},

	},

	{/* QUAT TDM */

		{0, 4, 8, 12, 16, 20, 24, 28,

			32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},/*MIC ARR*/

		{0, 8, 16, 24, 4, 12, 20, 28, 0xFFFF}, /*8 CH MIC ARR*/

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */

asoc/sa8155.c

+7 −9
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.

 */

/*

 * Copyright 2011, The Android Open Source Project
@@ -258,7 +258,7 @@ static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = { 
		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */

	},

	{ /* QUAT TDM */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 16}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
@@ -268,7 +268,7 @@ static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = { 
		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */

	},

	{ /* QUIN TDM */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 16}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8}, /* TX_0 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */

		{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
@@ -417,8 +417,8 @@ static unsigned int tdm_rx_slot_offset 
		{60,0xFFFF},

	},

	{/* QUIN TDM */

		{0, 8, 16, 24, 32, 40, 48, 56,

			4, 12, 20, 28, 36, 44, 52, 60, 0xFFFF}, /*16 CH SPKR*/

		{0, 4, 8, 12, 16, 20, 24, 28,

			32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF}, /*16 CH SPKR*/

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */
@@ -462,8 +462,7 @@ static unsigned int tdm_tx_slot_offset 
		{28, 0xFFFF},

	},

	{/* QUAT TDM */

		{0, 4, 8, 12, 16, 20, 24, 28,

			32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},/*16 CH MIC ARR1*/

		{0, 8, 16, 24, 4, 12, 20, 28, 0xFFFF}, /*8 CH MIC ARR1*/

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */
@@ -473,8 +472,7 @@ static unsigned int tdm_tx_slot_offset 
		{60,0xFFFF},

	},

	{/* QUIN TDM */

		{0, 4, 8, 12, 16, 20, 24, 28,

			32, 36, 40, 44, 48, 52, 56, 60, 0xFFFF},/*16 CH MIC ARR2*/

		{0, 4, 8, 12, 16, 20, 24, 28, 0xFFFF}, /*8 CH MIC ARR2*/

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */

		{0xFFFF}, /* not used */