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Commit 9353374b authored by Michael Ellerman's avatar Michael Ellerman Committed by Benjamin Herrenschmidt
Browse files

powerpc: Context switch the new EBB SPRs 



This context switches the new Event Based Branching (EBB) SPRs.  The three new
SPRs are:
  - Event Based Branch Handler Register (EBBHR)
  - Event Based Branch Return Register (EBBRR)
  - Branch Event Status and Control Register (BESCR)

Signed-off-by: default avatarMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: default avatarMatt Evans <matt@ozlabs.org>
Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 1ddf499e

arch/powerpc/include/asm/processor.h

+3 −0
Original line number Diff line number Diff line
@@ -281,6 +281,9 @@ struct thread_struct { 
#endif

#ifdef CONFIG_PPC_BOOK3S_64

	unsigned long	tar;

	unsigned long	ebbrr;

	unsigned long	ebbhr;

	unsigned long	bescr;

#endif

};

arch/powerpc/include/asm/reg.h

+3 −0
Original line number Diff line number Diff line
@@ -663,6 +663,9 @@ 
#define SPRN_MMCRH	316	/* Hypervisor monitor mode control register */

#define SPRN_MMCRS	894	/* Supervisor monitor mode control register */

#define SPRN_MMCRC	851	/* Core monitor mode control register */

#define SPRN_EBBHR	804	/* Event based branch handler register */

#define SPRN_EBBRR	805	/* Event based branch return register */

#define SPRN_BESCR	806	/* Branch event status and control register */



#define SPRN_PMC1	787

#define SPRN_PMC2	788

arch/powerpc/kernel/asm-offsets.c

+3 −0
Original line number Diff line number Diff line
@@ -124,6 +124,9 @@ int main(void) 


#ifdef CONFIG_PPC_BOOK3S_64

	DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));

	DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));

	DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));

	DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));

#endif

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

	DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));

arch/powerpc/kernel/entry_64.S

+16 −0
Original line number Diff line number Diff line
@@ -458,6 +458,14 @@ BEGIN_FTR_SECTION 
	 */

	mfspr	r0,SPRN_TAR

	std	r0,THREAD_TAR(r3)



	/* Event based branch registers */

	mfspr	r0, SPRN_BESCR

	std	r0, THREAD_BESCR(r3)

	mfspr	r0, SPRN_EBBHR

	std	r0, THREAD_EBBHR(r3)

	mfspr	r0, SPRN_EBBRR

	std	r0, THREAD_EBBRR(r3)

END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)

#endif
@@ -545,6 +553,14 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT) 


#ifdef CONFIG_PPC_BOOK3S_64

BEGIN_FTR_SECTION

	/* Event based branch registers */

	ld	r0, THREAD_BESCR(r4)

	mtspr	SPRN_BESCR, r0

	ld	r0, THREAD_EBBHR(r4)

	mtspr	SPRN_EBBHR, r0

	ld	r0, THREAD_EBBRR(r4)

	mtspr	SPRN_EBBRR, r0



	ld	r0,THREAD_TAR(r4)

	mtspr	SPRN_TAR,r0

END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)