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Commit 9352b05b authored by Rob Herring's avatar Rob Herring
Browse files

ARM: select MIGHT_HAVE_CACHE_L2X0 for V6 and V7 multi-platform 



Many V6 and V7 platforms have an L2x0 cache, so make
CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform
builds.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 90bc8ac7

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -921,6 +921,7 @@ config ARCH_MULTI_V7 


config ARCH_MULTI_V6_V7

	bool

	select MIGHT_HAVE_CACHE_L2X0



config ARCH_MULTI_CPU_AUTO

	def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)

arch/arm/mach-cns3xxx/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@ config ARCH_CNS3XXX 
	bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6

	select ARM_GIC

	select CPU_V6K

	select MIGHT_HAVE_CACHE_L2X0

	select MIGHT_HAVE_PCI

	select PCI_DOMAINS if PCI

	help

arch/arm/mach-imx/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ config ARCH_MXC 
	select CLKSRC_MMIO

	select GENERIC_ALLOCATOR

	select GENERIC_IRQ_CHIP

	select MIGHT_HAVE_CACHE_L2X0 if ARCH_MULTI_V6_V7

	select PINCTRL

	select SOC_BUS

	help

arch/arm/mach-prima2/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@ config ARCH_SIRF 
	bool "CSR SiRF" if ARCH_MULTI_V7

	select ARCH_REQUIRE_GPIOLIB

	select GENERIC_IRQ_CHIP

	select MIGHT_HAVE_CACHE_L2X0

	select NO_IOPORT

	select PINCTRL

	select PINCTRL_SIRF

arch/arm/mach-shmobile/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ config ARCH_SHMOBILE_MULTI 
	select HAVE_ARM_SCU if SMP

	select HAVE_ARM_TWD if SMP

	select ARM_GIC

	select MIGHT_HAVE_CACHE_L2X0

	select MIGHT_HAVE_PCI

	select NO_IOPORT

	select PINCTRL