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Commit 925d5d79 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx8: apply dynamic cu mask to APUs as well 



Confirmed with the hw team.  It's the same for all asics.

Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ecf9d344

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+4 −6
Original line number Diff line number Diff line
@@ -4622,12 +4622,10 @@ static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring) 
	mqd->compute_static_thread_mgmt_se2 = 0xffffffff;

	mqd->compute_static_thread_mgmt_se3 = 0xffffffff;

	mqd->compute_misc_reserved = 0x00000003;

	if (!(adev->flags & AMD_IS_APU)) {

	mqd->dynamic_cu_mask_addr_lo = lower_32_bits(ring->mqd_gpu_addr

						     + offsetof(struct vi_mqd_allocation, dynamic_cu_mask));

	mqd->dynamic_cu_mask_addr_hi = upper_32_bits(ring->mqd_gpu_addr

						     + offsetof(struct vi_mqd_allocation, dynamic_cu_mask));

	}

	eop_base_addr = ring->eop_gpu_addr >> 8;

	mqd->cp_hqd_eop_base_addr_lo = eop_base_addr;

	mqd->cp_hqd_eop_base_addr_hi = upper_32_bits(eop_base_addr);