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Commit 925bb17b authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
Browse files

sh: switch sh7722 to clkdev



This patch converts the remaining sh7722 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.

Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 00522ac3
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+6 −8
Original line number Original line Diff line number Diff line
@@ -37,8 +37,6 @@


/* Fixed 32 KHz root clock for RTC and Power Management purposes */
/* Fixed 32 KHz root clock for RTC and Power Management purposes */
static struct clk r_clk = {
static struct clk r_clk = {
	.name           = "rclk",
	.id             = -1,
	.rate           = 32768,
	.rate           = 32768,
};
};


@@ -47,8 +45,6 @@ static struct clk r_clk = {
 * from the platform code.
 * from the platform code.
 */
 */
struct clk extal_clk = {
struct clk extal_clk = {
	.name		= "extal",
	.id		= -1,
	.rate		= 33333333,
	.rate		= 33333333,
};
};


@@ -70,8 +66,6 @@ static struct clk_ops dll_clk_ops = {
};
};


static struct clk dll_clk = {
static struct clk dll_clk = {
	.name           = "dll_clk",
	.id             = -1,
	.ops		= &dll_clk_ops,
	.ops		= &dll_clk_ops,
	.parent		= &r_clk,
	.parent		= &r_clk,
	.flags		= CLK_ENABLE_ON_INIT,
	.flags		= CLK_ENABLE_ON_INIT,
@@ -95,8 +89,6 @@ static struct clk_ops pll_clk_ops = {
};
};


static struct clk pll_clk = {
static struct clk pll_clk = {
	.name		= "pll_clk",
	.id		= -1,
	.ops		= &pll_clk_ops,
	.ops		= &pll_clk_ops,
	.flags		= CLK_ENABLE_ON_INIT,
	.flags		= CLK_ENABLE_ON_INIT,
};
};
@@ -186,6 +178,12 @@ static struct clk mstp_clks[HWBLK_NR] = {
#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }


static struct clk_lookup lookups[] = {
static struct clk_lookup lookups[] = {
	/* main clocks */
	CLKDEV_CON_ID("rclk", &r_clk),
	CLKDEV_CON_ID("extal", &extal_clk),
	CLKDEV_CON_ID("dll_clk", &dll_clk),
	CLKDEV_CON_ID("pll_clk", &pll_clk),

	/* DIV4 clocks */
	/* DIV4 clocks */
	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
	CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
	CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),