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Commit 92547f2b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'sun4i-emac-big-endian' 



Michael Weiser says:

====================
sun4i-emac: Fixes for running a big-endian kernel on Cubieboard2

the following patches are what remains to be fixed in order to allow running a
big-endian kernel on the Cubieboard2.

The first patch fixes up endianness problems with DMA descriptors in
the stmmac driver preventing it from working correctly when runnning a
big-endian kernel.

The second patch adds the ability to enable diagnostic messages in the
sun4i-emac driver which were instrumental in finding the problem fixed
by patch number three: Endianness confusion caused by dual-purpose I/O
register usage in sun4i-emac.

All of these have been tested successfully on a Cubieboard2 DualCard.

Changes since v4:
- Rebased to current master
- Removed already applied patches to sunxi-mmc and sunxi-Kconfig

Changes since v3:
- Rebased sunxi-mmc patch against Ulf's mmc.git/next
- Changed Kconfig change to enable big-endian support only for sun7i
  devices

Changes since v2:
- Fixed typo in stmmac patch causing a build failure
- Added sun4i-emac patches

Changes since v1:
- Fixed checkpatch niggles
- Added respective Cc:s
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 47805667 934d0048

drivers/net/ethernet/allwinner/sun4i-emac.c

+23 −2
Original line number Diff line number Diff line
@@ -37,6 +37,11 @@ 


#define EMAC_MAX_FRAME_LEN	0x0600



#define EMAC_DEFAULT_MSG_ENABLE 0x0000

static int debug = -1;     /* defaults above */;

module_param(debug, int, 0);

MODULE_PARM_DESC(debug, "debug message flags");



/* Transmit timeout, default 5 seconds. */

static int watchdog = 5000;

module_param(watchdog, int, 0400);
@@ -225,11 +230,27 @@ static void emac_get_drvinfo(struct net_device *dev, 
	strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info));

}



static u32 emac_get_msglevel(struct net_device *dev)

{

	struct emac_board_info *db = netdev_priv(dev);



	return db->msg_enable;

}



static void emac_set_msglevel(struct net_device *dev, u32 value)

{

	struct emac_board_info *db = netdev_priv(dev);



	db->msg_enable = value;

}



static const struct ethtool_ops emac_ethtool_ops = {

	.get_drvinfo	= emac_get_drvinfo,

	.get_link	= ethtool_op_get_link,

	.get_link_ksettings = phy_ethtool_get_link_ksettings,

	.set_link_ksettings = phy_ethtool_set_link_ksettings,

	.get_msglevel	= emac_get_msglevel,

	.set_msglevel	= emac_set_msglevel,

};



static unsigned int emac_setup(struct net_device *ndev)
@@ -571,8 +592,7 @@ static void emac_rx(struct net_device *dev) 
		/* A packet ready now  & Get status/length */

		good_packet = true;



		emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,

				&rxhdr, sizeof(rxhdr));

		rxhdr = readl(db->membase + EMAC_RX_IO_DATA_REG);



		if (netif_msg_rx_status(db))

			dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr)));
@@ -804,6 +824,7 @@ static int emac_probe(struct platform_device *pdev) 
	db->dev = &pdev->dev;

	db->ndev = ndev;

	db->pdev = pdev;

	db->msg_enable = netif_msg_init(debug, EMAC_DEFAULT_MSG_ENABLE);



	spin_lock_init(&db->lock);

drivers/net/ethernet/stmicro/stmmac/chain_mode.c

+29 −26
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) 
	unsigned int entry = priv->cur_tx;

	struct dma_desc *desc = priv->dma_tx + entry;

	unsigned int nopaged_len = skb_headlen(skb);

	unsigned int bmax;

	unsigned int bmax, des2;

	unsigned int i = 1, len;



	if (priv->plat->enh_desc)
@@ -44,11 +44,12 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) 


	len = nopaged_len - bmax;



	desc->des2 = dma_map_single(priv->device, skb->data,

	des2 = dma_map_single(priv->device, skb->data,

			      bmax, DMA_TO_DEVICE);

	if (dma_mapping_error(priv->device, desc->des2))

	desc->des2 = cpu_to_le32(des2);

	if (dma_mapping_error(priv->device, des2))

		return -1;

	priv->tx_skbuff_dma[entry].buf = desc->des2;

	priv->tx_skbuff_dma[entry].buf = des2;

	priv->tx_skbuff_dma[entry].len = bmax;

	/* do not close the descriptor and do not set own bit */

	priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE,
@@ -60,12 +61,13 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) 
		desc = priv->dma_tx + entry;



		if (len > bmax) {

			desc->des2 = dma_map_single(priv->device,

			des2 = dma_map_single(priv->device,

					      (skb->data + bmax * i),

					      bmax, DMA_TO_DEVICE);

			if (dma_mapping_error(priv->device, desc->des2))

			desc->des2 = cpu_to_le32(des2);

			if (dma_mapping_error(priv->device, des2))

				return -1;

			priv->tx_skbuff_dma[entry].buf = desc->des2;

			priv->tx_skbuff_dma[entry].buf = des2;

			priv->tx_skbuff_dma[entry].len = bmax;

			priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum,

							STMMAC_CHAIN_MODE, 1,
@@ -73,12 +75,13 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) 
			len -= bmax;

			i++;

		} else {

			desc->des2 = dma_map_single(priv->device,

			des2 = dma_map_single(priv->device,

					      (skb->data + bmax * i), len,

					      DMA_TO_DEVICE);

			if (dma_mapping_error(priv->device, desc->des2))

			desc->des2 = cpu_to_le32(des2);

			if (dma_mapping_error(priv->device, des2))

				return -1;

			priv->tx_skbuff_dma[entry].buf = desc->des2;

			priv->tx_skbuff_dma[entry].buf = des2;

			priv->tx_skbuff_dma[entry].len = len;

			/* last descriptor can be set now */

			priv->hw->desc->prepare_tx_desc(desc, 0, len, csum,
@@ -119,19 +122,19 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr, 
		struct dma_extended_desc *p = (struct dma_extended_desc *)des;

		for (i = 0; i < (size - 1); i++) {

			dma_phy += sizeof(struct dma_extended_desc);

			p->basic.des3 = (unsigned int)dma_phy;

			p->basic.des3 = cpu_to_le32((unsigned int)dma_phy);

			p++;

		}

		p->basic.des3 = (unsigned int)phy_addr;

		p->basic.des3 = cpu_to_le32((unsigned int)phy_addr);



	} else {

		struct dma_desc *p = (struct dma_desc *)des;

		for (i = 0; i < (size - 1); i++) {

			dma_phy += sizeof(struct dma_desc);

			p->des3 = (unsigned int)dma_phy;

			p->des3 = cpu_to_le32((unsigned int)dma_phy);

			p++;

		}

		p->des3 = (unsigned int)phy_addr;

		p->des3 = cpu_to_le32((unsigned int)phy_addr);

	}

}
@@ -144,10 +147,10 @@ static void stmmac_refill_desc3(void *priv_ptr, struct dma_desc *p) 
		 * 1588-2002 time stamping is enabled, hence reinitialize it

		 * to keep explicit chaining in the descriptor.

		 */

		p->des3 = (unsigned int)(priv->dma_rx_phy +

		p->des3 = cpu_to_le32((unsigned int)(priv->dma_rx_phy +

				      (((priv->dirty_rx) + 1) %

				       DMA_RX_SIZE) *

					 sizeof(struct dma_desc));

				      sizeof(struct dma_desc)));

}



static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p)
@@ -161,9 +164,9 @@ static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p) 
		 * 1588-2002 time stamping is enabled, hence reinitialize it

		 * to keep explicit chaining in the descriptor.

		 */

		p->des3 = (unsigned int)((priv->dma_tx_phy +

		p->des3 = cpu_to_le32((unsigned int)((priv->dma_tx_phy +

				      ((priv->dirty_tx + 1) % DMA_TX_SIZE))

					  * sizeof(struct dma_desc));

				      * sizeof(struct dma_desc)));

}



const struct stmmac_mode_ops chain_mode_ops = {

drivers/net/ethernet/stmicro/stmmac/descs.h

+10 −10
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ 
#define	TDES0_ERROR_SUMMARY		BIT(15)

#define	TDES0_IP_HEADER_ERROR		BIT(16)

#define	TDES0_TIME_STAMP_STATUS		BIT(17)

#define	TDES0_OWN			BIT(31)

#define	TDES0_OWN			((u32)BIT(31))	/* silence sparse */

/* TDES1 */

#define	TDES1_BUFFER1_SIZE_MASK		GENMASK(10, 0)

#define	TDES1_BUFFER2_SIZE_MASK		GENMASK(21, 11)
@@ -130,7 +130,7 @@ 
#define	ETDES0_FIRST_SEGMENT		BIT(28)

#define	ETDES0_LAST_SEGMENT		BIT(29)

#define	ETDES0_INTERRUPT		BIT(30)

#define	ETDES0_OWN			BIT(31)

#define	ETDES0_OWN			((u32)BIT(31))	/* silence sparse */

/* TDES1 */

#define	ETDES1_BUFFER1_SIZE_MASK	GENMASK(12, 0)

#define	ETDES1_BUFFER2_SIZE_MASK	GENMASK(28, 16)
@@ -166,19 +166,19 @@ 


/* Basic descriptor structure for normal and alternate descriptors */

struct dma_desc {

	unsigned int des0;

	unsigned int des1;

	unsigned int des2;

	unsigned int des3;

	__le32 des0;

	__le32 des1;

	__le32 des2;

	__le32 des3;

};



/* Extended descriptor structure (e.g. >= databook 3.50a) */

struct dma_extended_desc {

	struct dma_desc basic;	/* Basic descriptors */

	unsigned int des4;	/* Extended Status */

	unsigned int des5;	/* Reserved */

	unsigned int des6;	/* Tx/Rx Timestamp Low */

	unsigned int des7;	/* Tx/Rx Timestamp High */

	__le32 des4;	/* Extended Status */

	__le32 des5;	/* Reserved */

	__le32 des6;	/* Tx/Rx Timestamp Low */

	__le32 des7;	/* Tx/Rx Timestamp High */

};



/* Transmit checksum insertion control */

drivers/net/ethernet/stmicro/stmmac/descs_com.h

+26 −22
Original line number Diff line number Diff line
@@ -35,47 +35,50 @@ 
/* Enhanced descriptors */

static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end)

{

	p->des1 |= ((BUF_SIZE_8KiB - 1) << ERDES1_BUFFER2_SIZE_SHIFT)

		   & ERDES1_BUFFER2_SIZE_MASK;

	p->des1 |= cpu_to_le32(((BUF_SIZE_8KiB - 1)

			<< ERDES1_BUFFER2_SIZE_SHIFT)

		   & ERDES1_BUFFER2_SIZE_MASK);



	if (end)

		p->des1 |= ERDES1_END_RING;

		p->des1 |= cpu_to_le32(ERDES1_END_RING);

}



static inline void enh_desc_end_tx_desc_on_ring(struct dma_desc *p, int end)

{

	if (end)

		p->des0 |= ETDES0_END_RING;

		p->des0 |= cpu_to_le32(ETDES0_END_RING);

	else

		p->des0 &= ~ETDES0_END_RING;

		p->des0 &= cpu_to_le32(~ETDES0_END_RING);

}



static inline void enh_set_tx_desc_len_on_ring(struct dma_desc *p, int len)

{

	if (unlikely(len > BUF_SIZE_4KiB)) {

		p->des1 |= (((len - BUF_SIZE_4KiB) << ETDES1_BUFFER2_SIZE_SHIFT)

		p->des1 |= cpu_to_le32((((len - BUF_SIZE_4KiB)

					<< ETDES1_BUFFER2_SIZE_SHIFT)

			    & ETDES1_BUFFER2_SIZE_MASK) | (BUF_SIZE_4KiB

			    & ETDES1_BUFFER1_SIZE_MASK);

			    & ETDES1_BUFFER1_SIZE_MASK));

	} else

		p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK);

		p->des1 |= cpu_to_le32((len & ETDES1_BUFFER1_SIZE_MASK));

}



/* Normal descriptors */

static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end)

{

	p->des1 |= ((BUF_SIZE_2KiB - 1) << RDES1_BUFFER2_SIZE_SHIFT)

		    & RDES1_BUFFER2_SIZE_MASK;

	p->des1 |= cpu_to_le32(((BUF_SIZE_2KiB - 1)

				<< RDES1_BUFFER2_SIZE_SHIFT)

		    & RDES1_BUFFER2_SIZE_MASK);



	if (end)

		p->des1 |= RDES1_END_RING;

		p->des1 |= cpu_to_le32(RDES1_END_RING);

}



static inline void ndesc_end_tx_desc_on_ring(struct dma_desc *p, int end)

{

	if (end)

		p->des1 |= TDES1_END_RING;

		p->des1 |= cpu_to_le32(TDES1_END_RING);

	else

		p->des1 &= ~TDES1_END_RING;

		p->des1 &= cpu_to_le32(~TDES1_END_RING);

}



static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len)
@@ -83,10 +86,11 @@ static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) 
	if (unlikely(len > BUF_SIZE_2KiB)) {

		unsigned int buffer1 = (BUF_SIZE_2KiB - 1)

					& TDES1_BUFFER1_SIZE_MASK;

		p->des1 |= ((((len - buffer1) << TDES1_BUFFER2_SIZE_SHIFT)

		p->des1 |= cpu_to_le32((((len - buffer1)

					<< TDES1_BUFFER2_SIZE_SHIFT)

				& TDES1_BUFFER2_SIZE_MASK) | buffer1);

	} else

		p->des1 |= (len & TDES1_BUFFER1_SIZE_MASK);

		p->des1 |= cpu_to_le32((len & TDES1_BUFFER1_SIZE_MASK));

}



/* Specific functions used for Chain mode */
@@ -94,32 +98,32 @@ static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len) 
/* Enhanced descriptors */

static inline void ehn_desc_rx_set_on_chain(struct dma_desc *p)

{

	p->des1 |= ERDES1_SECOND_ADDRESS_CHAINED;

	p->des1 |= cpu_to_le32(ERDES1_SECOND_ADDRESS_CHAINED);

}



static inline void enh_desc_end_tx_desc_on_chain(struct dma_desc *p)

{

	p->des0 |= ETDES0_SECOND_ADDRESS_CHAINED;

	p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED);

}



static inline void enh_set_tx_desc_len_on_chain(struct dma_desc *p, int len)

{

	p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK);

	p->des1 |= cpu_to_le32(len & ETDES1_BUFFER1_SIZE_MASK);

}



/* Normal descriptors */

static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end)

{

	p->des1 |= RDES1_SECOND_ADDRESS_CHAINED;

	p->des1 |= cpu_to_le32(RDES1_SECOND_ADDRESS_CHAINED);

}



static inline void ndesc_tx_set_on_chain(struct dma_desc *p)

{

	p->des1 |= TDES1_SECOND_ADDRESS_CHAINED;

	p->des1 |= cpu_to_le32(TDES1_SECOND_ADDRESS_CHAINED);

}



static inline void norm_set_tx_desc_len_on_chain(struct dma_desc *p, int len)

{

	p->des1 |= len & TDES1_BUFFER1_SIZE_MASK;

	p->des1 |= cpu_to_le32(len & TDES1_BUFFER1_SIZE_MASK);

}

#endif /* __DESC_COM_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

+31 −29
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ static int dwmac4_wrback_get_tx_status(void *data, struct stmmac_extra_stats *x, 
	unsigned int tdes3;

	int ret = tx_done;



	tdes3 = p->des3;

	tdes3 = le32_to_cpu(p->des3);



	/* Get tx owner first */

	if (unlikely(tdes3 & TDES3_OWN))
@@ -77,9 +77,9 @@ static int dwmac4_wrback_get_rx_status(void *data, struct stmmac_extra_stats *x, 
				       struct dma_desc *p)

{

	struct net_device_stats *stats = (struct net_device_stats *)data;

	unsigned int rdes1 = p->des1;

	unsigned int rdes2 = p->des2;

	unsigned int rdes3 = p->des3;

	unsigned int rdes1 = le32_to_cpu(p->des1);

	unsigned int rdes2 = le32_to_cpu(p->des2);

	unsigned int rdes3 = le32_to_cpu(p->des3);

	int message_type;

	int ret = good_frame;
@@ -169,42 +169,43 @@ static int dwmac4_wrback_get_rx_status(void *data, struct stmmac_extra_stats *x, 


static int dwmac4_rd_get_tx_len(struct dma_desc *p)

{

	return (p->des2 & TDES2_BUFFER1_SIZE_MASK);

	return (le32_to_cpu(p->des2) & TDES2_BUFFER1_SIZE_MASK);

}



static int dwmac4_get_tx_owner(struct dma_desc *p)

{

	return (p->des3 & TDES3_OWN) >> TDES3_OWN_SHIFT;

	return (le32_to_cpu(p->des3) & TDES3_OWN) >> TDES3_OWN_SHIFT;

}



static void dwmac4_set_tx_owner(struct dma_desc *p)

{

	p->des3 |= TDES3_OWN;

	p->des3 |= cpu_to_le32(TDES3_OWN);

}



static void dwmac4_set_rx_owner(struct dma_desc *p)

{

	p->des3 |= RDES3_OWN;

	p->des3 |= cpu_to_le32(RDES3_OWN);

}



static int dwmac4_get_tx_ls(struct dma_desc *p)

{

	return (p->des3 & TDES3_LAST_DESCRIPTOR) >> TDES3_LAST_DESCRIPTOR_SHIFT;

	return (le32_to_cpu(p->des3) & TDES3_LAST_DESCRIPTOR)

		>> TDES3_LAST_DESCRIPTOR_SHIFT;

}



static int dwmac4_wrback_get_rx_frame_len(struct dma_desc *p, int rx_coe)

{

	return (p->des3 & RDES3_PACKET_SIZE_MASK);

	return (le32_to_cpu(p->des3) & RDES3_PACKET_SIZE_MASK);

}



static void dwmac4_rd_enable_tx_timestamp(struct dma_desc *p)

{

	p->des2 |= TDES2_TIMESTAMP_ENABLE;

	p->des2 |= cpu_to_le32(TDES2_TIMESTAMP_ENABLE);

}



static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p)

{

	return (p->des3 & TDES3_TIMESTAMP_STATUS)

	return (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS)

		>> TDES3_TIMESTAMP_STATUS_SHIFT;

}
@@ -216,9 +217,9 @@ static u64 dwmac4_wrback_get_timestamp(void *desc, u32 ats) 
	struct dma_desc *p = (struct dma_desc *)desc;

	u64 ns;



	ns = p->des0;

	ns = le32_to_cpu(p->des0);

	/* convert high/sec time stamp value to nanosecond */

	ns += p->des1 * 1000000000ULL;

	ns += le32_to_cpu(p->des1) * 1000000000ULL;



	return ns;

}
@@ -227,17 +228,17 @@ static int dwmac4_context_get_rx_timestamp_status(void *desc, u32 ats) 
{

	struct dma_desc *p = (struct dma_desc *)desc;



	return (p->des1 & RDES1_TIMESTAMP_AVAILABLE)

	return (le32_to_cpu(p->des1) & RDES1_TIMESTAMP_AVAILABLE)

		>> RDES1_TIMESTAMP_AVAILABLE_SHIFT;

}



static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic,

				   int mode, int end)

{

	p->des3 = RDES3_OWN | RDES3_BUFFER1_VALID_ADDR;

	p->des3 = cpu_to_le32(RDES3_OWN | RDES3_BUFFER1_VALID_ADDR);



	if (!disable_rx_ic)

		p->des3 |= RDES3_INT_ON_COMPLETION_EN;

		p->des3 |= cpu_to_le32(RDES3_INT_ON_COMPLETION_EN);

}



static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end)
@@ -252,9 +253,9 @@ static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, 
				      bool csum_flag, int mode, bool tx_own,

				      bool ls)

{

	unsigned int tdes3 = p->des3;

	unsigned int tdes3 = le32_to_cpu(p->des3);



	p->des2 |= (len & TDES2_BUFFER1_SIZE_MASK);

	p->des2 |= cpu_to_le32(len & TDES2_BUFFER1_SIZE_MASK);



	if (is_fs)

		tdes3 |= TDES3_FIRST_DESCRIPTOR;
@@ -282,7 +283,7 @@ static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, 
		 */

		wmb();



	p->des3 = tdes3;

	p->des3 = cpu_to_le32(tdes3);

}



static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs,
@@ -290,14 +291,14 @@ static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, 
					  bool ls, unsigned int tcphdrlen,

					  unsigned int tcppayloadlen)

{

	unsigned int tdes3 = p->des3;

	unsigned int tdes3 = le32_to_cpu(p->des3);



	if (len1)

		p->des2 |= (len1 & TDES2_BUFFER1_SIZE_MASK);

		p->des2 |= cpu_to_le32((len1 & TDES2_BUFFER1_SIZE_MASK));



	if (len2)

		p->des2 |= (len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT)

			    & TDES2_BUFFER2_SIZE_MASK;

		p->des2 |= cpu_to_le32((len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT)

			    & TDES2_BUFFER2_SIZE_MASK);



	if (is_fs) {

		tdes3 |= TDES3_FIRST_DESCRIPTOR |
@@ -325,7 +326,7 @@ static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs, 
		 */

		wmb();



	p->des3 = tdes3;

	p->des3 = cpu_to_le32(tdes3);

}



static void dwmac4_release_tx_desc(struct dma_desc *p, int mode)
@@ -336,7 +337,7 @@ static void dwmac4_release_tx_desc(struct dma_desc *p, int mode) 


static void dwmac4_rd_set_tx_ic(struct dma_desc *p)

{

	p->des2 |= TDES2_INTERRUPT_ON_COMPLETION;

	p->des2 |= cpu_to_le32(TDES2_INTERRUPT_ON_COMPLETION);

}



static void dwmac4_display_ring(void *head, unsigned int size, bool rx)
@@ -349,7 +350,8 @@ static void dwmac4_display_ring(void *head, unsigned int size, bool rx) 
	for (i = 0; i < size; i++) {

		pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",

			i, (unsigned int)virt_to_phys(p),

			p->des0, p->des1, p->des2, p->des3);

			le32_to_cpu(p->des0), le32_to_cpu(p->des1),

			le32_to_cpu(p->des2), le32_to_cpu(p->des3));

		p++;

	}

}
@@ -358,8 +360,8 @@ static void dwmac4_set_mss_ctxt(struct dma_desc *p, unsigned int mss) 
{

	p->des0 = 0;

	p->des1 = 0;

	p->des2 = mss;

	p->des3 = TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV;

	p->des2 = cpu_to_le32(mss);

	p->des3 = cpu_to_le32(TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV);

}



const struct stmmac_desc_ops dwmac4_desc_ops = {