Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 91b6fc02 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2015-09-10' of... 

Merge tag 'drm-intel-next-fixes-2015-09-10' of git://anongit.freedesktop.org/drm-intel into drm-next

Fixes headed for v4.3-rc1, including Maarten's DP MST state checker fix
you requested.

* tag 'drm-intel-next-fixes-2015-09-10' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Allow DSI dual link to be configured on any pipe
  drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOS
  drm/i915: Fix CSR MMIO address check
  drm/i915: Limit the number of loops for reading a split 64bit register
  drm/i915: Fix broken mst get_hw_state.
  drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x
  uapi/drm/i915_drm.h: fix userspace compilation.
  drm/i915: Always mark the object as dirty when used by the GPU
parents bd3e1c7c 82425785

drivers/gpu/drm/i915/i915_drv.h

+7 −5
Original line number Diff line number Diff line
@@ -1928,6 +1928,8 @@ struct drm_i915_private { 
			struct skl_wm_values skl_hw;

			struct vlv_wm_values vlv;

		};



		uint8_t max_level;

	} wm;



	struct i915_runtime_pm pm;
@@ -3383,13 +3385,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); 
#define I915_READ64(reg)	dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)



#define I915_READ64_2x32(lower_reg, upper_reg) ({			\

	u32 upper, lower, tmp;						\

	tmp = I915_READ(upper_reg);					\

	u32 upper, lower, old_upper, loop = 0;				\

	upper = I915_READ(upper_reg);					\

	do {								\

		upper = tmp;						\

		old_upper = upper;					\

		lower = I915_READ(lower_reg);				\

		tmp = I915_READ(upper_reg);				\

	} while (upper != tmp);						\

		upper = I915_READ(upper_reg);				\

	} while (upper != old_upper && loop++ < 2);			\

	(u64)upper << 32 | lower; })



#define POSTING_READ(reg)	(void)I915_READ_NOTRACE(reg)

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+1 −1
Original line number Diff line number Diff line
@@ -1032,6 +1032,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, 
		u32 old_read = obj->base.read_domains;

		u32 old_write = obj->base.write_domain;



		obj->dirty = 1; /* be paranoid  */

		obj->base.write_domain = obj->base.pending_write_domain;

		if (obj->base.write_domain == 0)

			obj->base.pending_read_domains |= obj->base.read_domains;
@@ -1039,7 +1040,6 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, 


		i915_vma_move_to_active(vma, req);

		if (obj->base.write_domain) {

			obj->dirty = 1;

			i915_gem_request_assign(&obj->last_write_req, req);



			intel_fb_obj_invalidate(obj, ORIGIN_CS);

drivers/gpu/drm/i915/i915_irq.c

+1 −1
Original line number Diff line number Diff line
@@ -1558,7 +1558,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev) 
		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;



		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,

				   hotplug_trigger, hpd_status_g4x,

				   hotplug_trigger, hpd_status_i915,

				   i9xx_port_hotplug_long_detect);

		intel_hpd_irq_handler(dev, pin_mask, long_mask);

	}

drivers/gpu/drm/i915/intel_csr.c

+1 −1
Original line number Diff line number Diff line
@@ -350,7 +350,7 @@ static void finish_csr_load(const struct firmware *fw, void *context) 
	}

	csr->mmio_count = dmc_header->mmio_count;

	for (i = 0; i < dmc_header->mmio_count; i++) {

		if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE &&

		if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE ||

			dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) {

			DRM_ERROR(" Firmware has wrong mmio address 0x%x\n",

						dmc_header->mmioaddr[i]);

drivers/gpu/drm/i915/intel_display.c

+4 −4
Original line number Diff line number Diff line
@@ -6305,7 +6305,7 @@ static void intel_connector_check_state(struct intel_connector *connector) 
		      connector->base.name);



	if (connector->get_hw_state(connector)) {

		struct drm_encoder *encoder = &connector->encoder->base;

		struct intel_encoder *encoder = connector->encoder;

		struct drm_connector_state *conn_state = connector->base.state;



		I915_STATE_WARN(!crtc,
@@ -6317,13 +6317,13 @@ static void intel_connector_check_state(struct intel_connector *connector) 
		I915_STATE_WARN(!crtc->state->active,

		      "connector is active, but attached crtc isn't\n");



		if (!encoder)

		if (!encoder || encoder->type == INTEL_OUTPUT_DP_MST)

			return;



		I915_STATE_WARN(conn_state->best_encoder != encoder,

		I915_STATE_WARN(conn_state->best_encoder != &encoder->base,

			"atomic encoder doesn't match attached encoder\n");



		I915_STATE_WARN(conn_state->crtc != encoder->crtc,

		I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,

			"attached encoder crtc differs from connector crtc\n");

	} else {

		I915_STATE_WARN(crtc && crtc->state->active,