Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 916910ad authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: fix the gart table cleared issue for S3



Something writes over the first 8 MB so reserve this
on vega10 until we root cause it.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a0bae357
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -607,6 +607,7 @@ struct amdgpu_mc {
	uint32_t                srbm_soft_reset;
	struct amdgpu_mode_mc_save save;
	bool			prt_warning;
	uint64_t		stolen_size;
	/* apertures */
	u64					shared_aperture_start;
	u64					shared_aperture_end;
+1 −1
Original line number Diff line number Diff line
@@ -1121,7 +1121,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
	/* Change the size here instead of the init above so only lpfn is affected */
	amdgpu_ttm_set_active_vram_size(adev, adev->mc.visible_vram_size);

	r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true,
	r = amdgpu_bo_create(adev, adev->mc.stolen_size, PAGE_SIZE, true,
			     AMDGPU_GEM_DOMAIN_VRAM,
			     AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
			     AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
+2 −0
Original line number Diff line number Diff line
@@ -834,6 +834,8 @@ static int gmc_v6_0_sw_init(void *handle)

	adev->mc.mc_mask = 0xffffffffffULL;

	adev->mc.stolen_size = 256 * 1024;

	adev->need_dma32 = false;
	dma_bits = adev->need_dma32 ? 32 : 40;
	r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
+2 −0
Original line number Diff line number Diff line
@@ -970,6 +970,8 @@ static int gmc_v7_0_sw_init(void *handle)
	 */
	adev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

	adev->mc.stolen_size = 256 * 1024;

	/* set DMA mask + need_dma32 flags.
	 * PCIE - can handle 40-bits.
	 * IGP - can handle 40-bits
+2 −0
Original line number Diff line number Diff line
@@ -1054,6 +1054,8 @@ static int gmc_v8_0_sw_init(void *handle)
	 */
	adev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

	adev->mc.stolen_size = 256 * 1024;

	/* set DMA mask + need_dma32 flags.
	 * PCIE - can handle 40-bits.
	 * IGP - can handle 40-bits
Loading