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Commit 9125aeb3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM fixes from Russell King:
 "These are a number of updates to fix a few problems found in the ARM
  nommu code over the last couple of years, caused mostly by changes on
  the mmu side"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8573/1: domain: move {set,get}_domain under config guard
  ARM: 8572/1: nommu: change memory reserve for the vectors
  ARM: 8571/1: nommu: fix PMSAv7 setup
parents 67601c3b ec953b70
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+11 −0
Original line number Original line Diff line number Diff line
@@ -84,6 +84,7 @@


#ifndef __ASSEMBLY__
#ifndef __ASSEMBLY__


#ifdef CONFIG_CPU_CP15_MMU
static inline unsigned int get_domain(void)
static inline unsigned int get_domain(void)
{
{
	unsigned int domain;
	unsigned int domain;
@@ -103,6 +104,16 @@ static inline void set_domain(unsigned val)
	  : : "r" (val) : "memory");
	  : : "r" (val) : "memory");
	isb();
	isb();
}
}
#else
static inline unsigned int get_domain(void)
{
	return 0;
}

static inline void set_domain(unsigned val)
{
}
#endif


#ifdef CONFIG_CPU_USE_DOMAINS
#ifdef CONFIG_CPU_USE_DOMAINS
#define modify_domain(dom,type)					\
#define modify_domain(dom,type)					\
+1 −1
Original line number Original line Diff line number Diff line
@@ -236,7 +236,7 @@ ENTRY(__setup_mpu)
	mov	r0, #CONFIG_VECTORS_BASE	@ Cover from VECTORS_BASE
	mov	r0, #CONFIG_VECTORS_BASE	@ Cover from VECTORS_BASE
	ldr	r5,=(MPU_AP_PL1RW_PL0NA | MPU_RGN_NORMAL)
	ldr	r5,=(MPU_AP_PL1RW_PL0NA | MPU_RGN_NORMAL)
	/* Writing N to bits 5:1 (RSR_SZ) --> region size 2^N+1 */
	/* Writing N to bits 5:1 (RSR_SZ) --> region size 2^N+1 */
	mov	r6, #(((PAGE_SHIFT - 1) << MPU_RSR_SZ) | 1 << MPU_RSR_EN)
	mov	r6, #(((2 * PAGE_SHIFT - 1) << MPU_RSR_SZ) | 1 << MPU_RSR_EN)


	setup_region r0, r5, r6, MPU_DATA_SIDE	@ VECTORS_BASE, PL0 NA, enabled
	setup_region r0, r5, r6, MPU_DATA_SIDE	@ VECTORS_BASE, PL0 NA, enabled
	beq	3f				@ Memory-map not unified
	beq	3f				@ Memory-map not unified
+8 −7
Original line number Original line Diff line number Diff line
@@ -87,7 +87,6 @@ static unsigned long irbar_read(void)
/* MPU initialisation functions */
/* MPU initialisation functions */
void __init sanity_check_meminfo_mpu(void)
void __init sanity_check_meminfo_mpu(void)
{
{
	int i;
	phys_addr_t phys_offset = PHYS_OFFSET;
	phys_addr_t phys_offset = PHYS_OFFSET;
	phys_addr_t aligned_region_size, specified_mem_size, rounded_mem_size;
	phys_addr_t aligned_region_size, specified_mem_size, rounded_mem_size;
	struct memblock_region *reg;
	struct memblock_region *reg;
@@ -110,11 +109,13 @@ void __init sanity_check_meminfo_mpu(void)
		} else {
		} else {
			/*
			/*
			 * memblock auto merges contiguous blocks, remove
			 * memblock auto merges contiguous blocks, remove
			 * all blocks afterwards
			 * all blocks afterwards in one go (we can't remove
			 * blocks separately while iterating)
			 */
			 */
			pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
			pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
				  &mem_start, &reg->base);
				  &mem_end, &reg->base);
			memblock_remove(reg->base, reg->size);
			memblock_remove(reg->base, 0 - reg->base);
			break;
		}
		}
	}
	}


@@ -144,7 +145,7 @@ void __init sanity_check_meminfo_mpu(void)
		pr_warn("Truncating memory from %pa to %pa (MPU region constraints)",
		pr_warn("Truncating memory from %pa to %pa (MPU region constraints)",
				&specified_mem_size, &aligned_region_size);
				&specified_mem_size, &aligned_region_size);
		memblock_remove(mem_start + aligned_region_size,
		memblock_remove(mem_start + aligned_region_size,
				specified_mem_size - aligned_round_size);
				specified_mem_size - aligned_region_size);


		mem_end = mem_start + aligned_region_size;
		mem_end = mem_start + aligned_region_size;
	}
	}
@@ -261,7 +262,7 @@ void __init mpu_setup(void)
		return;
		return;


	region_err = mpu_setup_region(MPU_RAM_REGION, PHYS_OFFSET,
	region_err = mpu_setup_region(MPU_RAM_REGION, PHYS_OFFSET,
					ilog2(meminfo.bank[0].size),
					ilog2(memblock.memory.regions[0].size),
					MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL);
					MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL);
	if (region_err) {
	if (region_err) {
		panic("MPU region initialization failure! %d", region_err);
		panic("MPU region initialization failure! %d", region_err);
@@ -285,7 +286,7 @@ void __init arm_mm_memblock_reserve(void)
	 * some architectures which the DRAM is the exception vector to trap,
	 * some architectures which the DRAM is the exception vector to trap,
	 * alloc_page breaks with error, although it is not NULL, but "0."
	 * alloc_page breaks with error, although it is not NULL, but "0."
	 */
	 */
	memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
	memblock_reserve(CONFIG_VECTORS_BASE, 2 * PAGE_SIZE);
#else /* ifndef CONFIG_CPU_V7M */
#else /* ifndef CONFIG_CPU_V7M */
	/*
	/*
	 * There is no dedicated vector page on V7-M. So nothing needs to be
	 * There is no dedicated vector page on V7-M. So nothing needs to be