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Commit 90883a82 authored by LEROY Christophe's avatar LEROY Christophe Committed by Scott Wood
Browse files

powerpc/8xx: macro for handling CPU15 errata 



Having a macro will help keep clear code.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent 7f6972a0

arch/powerpc/kernel/head_8xx.S

+12 −6
Original line number Diff line number Diff line
@@ -297,6 +297,17 @@ SystemCall: 
 * We have to use the MD_xxx registers for the tablewalk because the

 * equivalent MI_xxx registers only perform the attribute functions.

 */



#ifdef CONFIG_8xx_CPU15

#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)	\

	addi	tmp, addr, PAGE_SIZE;	\

	tlbie	tmp;			\

	addi	tmp, addr, -PAGE_SIZE;	\

	tlbie	tmp

#else

#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)

#endif



InstructionTLBMiss:

#ifdef CONFIG_8xx_CPU6

	mtspr	SPRN_DAR, r3
@@ -304,12 +315,7 @@ InstructionTLBMiss: 
	EXCEPTION_PROLOG_0

	mtspr	SPRN_SPRG_SCRATCH2, r10

	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */

#ifdef CONFIG_8xx_CPU15

	addi	r11, r10, PAGE_SIZE

	tlbie	r11

	addi	r11, r10, -PAGE_SIZE

	tlbie	r11

#endif

	INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)



	/* If we are faulting a kernel address, we have to use the

	 * kernel page tables.