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Commit 9037d4b9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm/du/next' of git://linuxtv.org/pinchartl/media into drm-next 



Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2792436.F0zlxykWp6@avalon
parents 2989b3ce b06078de

Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required properties: 
- compatible : Shall contain one or more of

  - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX

  - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX

  - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX

  - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX



    When compatible with generic versions, nodes must list the SoC-specific

Documentation/devicetree/bindings/display/renesas,du.txt

+15 −13
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ Required Properties: 
    - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU

    - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU

    - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU

    - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU

    - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU

    - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
@@ -59,6 +60,7 @@ corresponding to each DU output. 
 R8A7794 (R-Car E2)     DPAD 0         DPAD 1         -              -

 R8A7795 (R-Car H3)     DPAD 0         HDMI 0         HDMI 1         LVDS 0

 R8A7796 (R-Car M3-W)   DPAD 0         HDMI 0         LVDS 0         -

 R8A77965 (R-Car M3-N)  DPAD 0         HDMI 0         LVDS 0         -

 R8A77970 (R-Car V3M)   DPAD 0         LVDS 0         -              -

 R8A77995 (R-Car D3)    DPAD 0         LVDS 0         LVDS 1         -

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+14 −12
Original line number Diff line number Diff line
@@ -767,7 +767,8 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) 
 * Initialization

 */



int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)

int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,

			unsigned int hwindex)

{

	static const unsigned int mmio_offsets[] = {

		DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET, DU3_REG_OFFSET
@@ -775,7 +776,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 


	struct rcar_du_device *rcdu = rgrp->dev;

	struct platform_device *pdev = to_platform_device(rcdu->dev);

	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];

	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[swindex];

	struct drm_crtc *crtc = &rcrtc->crtc;

	struct drm_plane *primary;

	unsigned int irqflags;
@@ -787,7 +788,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 


	/* Get the CRTC clock and the optional external clock. */

	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {

		sprintf(clk_name, "du.%u", index);

		sprintf(clk_name, "du.%u", hwindex);

		name = clk_name;

	} else {

		name = NULL;
@@ -795,16 +796,16 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 


	rcrtc->clock = devm_clk_get(rcdu->dev, name);

	if (IS_ERR(rcrtc->clock)) {

		dev_err(rcdu->dev, "no clock for CRTC %u\n", index);

		dev_err(rcdu->dev, "no clock for DU channel %u\n", hwindex);

		return PTR_ERR(rcrtc->clock);

	}



	sprintf(clk_name, "dclkin.%u", index);

	sprintf(clk_name, "dclkin.%u", hwindex);

	clk = devm_clk_get(rcdu->dev, clk_name);

	if (!IS_ERR(clk)) {

		rcrtc->extclock = clk;

	} else if (PTR_ERR(rcrtc->clock) == -EPROBE_DEFER) {

		dev_info(rcdu->dev, "can't get external clock %u\n", index);

		dev_info(rcdu->dev, "can't get external clock %u\n", hwindex);

		return -EPROBE_DEFER;

	}
@@ -813,13 +814,13 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 
	spin_lock_init(&rcrtc->vblank_lock);



	rcrtc->group = rgrp;

	rcrtc->mmio_offset = mmio_offsets[index];

	rcrtc->index = index;

	rcrtc->mmio_offset = mmio_offsets[hwindex];

	rcrtc->index = hwindex;



	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))

		primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;

	else

		primary = &rgrp->planes[index % 2].plane;

		primary = &rgrp->planes[swindex % 2].plane;



	ret = drm_crtc_init_with_planes(rcdu->ddev, crtc, primary,

					NULL, &crtc_funcs, NULL);
@@ -833,7 +834,8 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 


	/* Register the interrupt handler. */

	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {

		irq = platform_get_irq(pdev, index);

		/* The IRQ's are associated with the CRTC (sw)index. */

		irq = platform_get_irq(pdev, swindex);

		irqflags = 0;

	} else {

		irq = platform_get_irq(pdev, 0);
@@ -841,7 +843,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 
	}



	if (irq < 0) {

		dev_err(rcdu->dev, "no IRQ for CRTC %u\n", index);

		dev_err(rcdu->dev, "no IRQ for CRTC %u\n", swindex);

		return irq;

	}
@@ -849,7 +851,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) 
			       dev_name(rcdu->dev), rcrtc);

	if (ret < 0) {

		dev_err(rcdu->dev,

			"failed to register IRQ for CRTC %u\n", index);

			"failed to register IRQ for CRTC %u\n", swindex);

		return ret;

	}

drivers/gpu/drm/rcar-du/rcar_du_crtc.h

+2 −1
Original line number Diff line number Diff line
@@ -80,7 +80,8 @@ enum rcar_du_output { 
	RCAR_DU_OUTPUT_MAX,

};



int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index);

int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,

			unsigned int hwindex);

void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);

void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc);

drivers/gpu/drm/rcar-du/rcar_du_drv.c

+40 −11
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { 
	.gen = 2,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7743 has one RGB output and one LVDS output
@@ -61,7 +61,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { 
	.gen = 2,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7745 has two RGB outputs
@@ -80,7 +80,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { 
static const struct rcar_du_device_info rcar_du_r8a7779_info = {

	.gen = 2,

	.features = 0,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7779 has two RGB outputs and one (currently unsupported)
@@ -102,7 +102,7 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = { 
	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.quirks = RCAR_DU_QUIRK_ALIGN_128B,

	.num_crtcs = 3,

	.channels_mask = BIT(2) | BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7790 has one RGB output, two LVDS outputs and one
@@ -129,7 +129,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = { 
	.gen = 2,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A779[13] has one RGB output, one LVDS output and one
@@ -151,7 +151,7 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = { 
	.gen = 2,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/* R8A7792 has two RGB outputs. */

		[RCAR_DU_OUTPUT_DPAD0] = {
@@ -169,7 +169,7 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = { 
	.gen = 2,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS,

	.num_crtcs = 2,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7794 has two RGB outputs and one (currently unsupported)
@@ -191,7 +191,7 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { 
	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS

		  | RCAR_DU_FEATURE_VSP1_SOURCE,

	.num_crtcs = 4,

	.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7795 has one RGB output, two HDMI outputs and one
@@ -215,7 +215,7 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { 
		},

	},

	.num_lvds = 1,

	.dpll_ch =  BIT(1) | BIT(2),

	.dpll_ch =  BIT(2) | BIT(1),

};



static const struct rcar_du_device_info rcar_du_r8a7796_info = {
@@ -223,7 +223,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { 
	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS

		  | RCAR_DU_FEATURE_VSP1_SOURCE,

	.num_crtcs = 3,

	.channels_mask = BIT(2) | BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A7796 has one RGB output, one LVDS output and one HDMI
@@ -246,12 +246,40 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { 
	.dpll_ch =  BIT(1),

};



static const struct rcar_du_device_info rcar_du_r8a77965_info = {

	.gen = 3,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS

		  | RCAR_DU_FEATURE_VSP1_SOURCE,

	.channels_mask = BIT(3) | BIT(1) | BIT(0),

	.routes = {

		/*

		 * R8A77965 has one RGB output, one LVDS output and one HDMI

		 * output.

		 */

		[RCAR_DU_OUTPUT_DPAD0] = {

			.possible_crtcs = BIT(2),

			.port = 0,

		},

		[RCAR_DU_OUTPUT_HDMI0] = {

			.possible_crtcs = BIT(1),

			.port = 1,

		},

		[RCAR_DU_OUTPUT_LVDS0] = {

			.possible_crtcs = BIT(0),

			.port = 2,

		},

	},

	.num_lvds = 1,

	.dpll_ch =  BIT(1),

};



static const struct rcar_du_device_info rcar_du_r8a77970_info = {

	.gen = 3,

	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK

		  | RCAR_DU_FEATURE_EXT_CTRL_REGS

		  | RCAR_DU_FEATURE_VSP1_SOURCE,

	.num_crtcs = 1,

	.channels_mask = BIT(0),

	.routes = {

		/* R8A77970 has one RGB output and one LVDS output. */

		[RCAR_DU_OUTPUT_DPAD0] = {
@@ -277,6 +305,7 @@ static const struct of_device_id rcar_du_of_table[] = { 
	{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },

	{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },

	{ .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },

	{ .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info },

	{ .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info },

	{ }

};