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Commit 902bef73 authored by Sherry Hurwitz's avatar Sherry Hurwitz Committed by Rafael J. Wysocki
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cpupower: Add support for new AMD family 0x17



Add support for new AMD family 0x17
- Add bit field changes to the msr_pstate structure
- Add the new formula for the  calculation of cof
- Changed method to access to CpbDis

Signed-off-by: default avatarSherry Hurwitz <sherry.hurwitz@amd.com>
Acked-by: default avatarThomas Renninger <trenn@suse.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 6ae78b4e
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+23 −8
Original line number Original line Diff line number Diff line
@@ -26,6 +26,15 @@ union msr_pstate {
		unsigned res3:21;
		unsigned res3:21;
		unsigned en:1;
		unsigned en:1;
	} bits;
	} bits;
	struct {
		unsigned fid:8;
		unsigned did:6;
		unsigned vid:8;
		unsigned iddval:8;
		unsigned idddiv:2;
		unsigned res1:30;
		unsigned en:1;
	} fam17h_bits;
	unsigned long long val;
	unsigned long long val;
};
};


@@ -35,6 +44,8 @@ static int get_did(int family, union msr_pstate pstate)


	if (family == 0x12)
	if (family == 0x12)
		t = pstate.val & 0xf;
		t = pstate.val & 0xf;
	else if (family == 0x17)
		t = pstate.fam17h_bits.did;
	else
	else
		t = pstate.bits.did;
		t = pstate.bits.did;


@@ -44,16 +55,20 @@ static int get_did(int family, union msr_pstate pstate)
static int get_cof(int family, union msr_pstate pstate)
static int get_cof(int family, union msr_pstate pstate)
{
{
	int t;
	int t;
	int fid, did;
	int fid, did, cof;


	did = get_did(family, pstate);
	did = get_did(family, pstate);

	if (family == 0x17) {
		fid = pstate.fam17h_bits.fid;
		cof = 200 * fid / did;
	} else {
		t = 0x10;
		t = 0x10;
		fid = pstate.bits.fid;
		fid = pstate.bits.fid;
		if (family == 0x11)
		if (family == 0x11)
			t = 0x8;
			t = 0x8;

		cof = (100 * (fid + t)) >> did;
	return (100 * (fid + t)) >> did;
	}
	return cof;
}
}


/* Needs:
/* Needs:
+2 −0
Original line number Original line Diff line number Diff line
@@ -70,6 +70,8 @@ enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
#define CPUPOWER_CAP_IS_SNB		0x00000020
#define CPUPOWER_CAP_IS_SNB		0x00000020
#define CPUPOWER_CAP_INTEL_IDA		0x00000040
#define CPUPOWER_CAP_INTEL_IDA		0x00000040


#define CPUPOWER_AMD_CPBDIS		0x02000000

#define MAX_HW_PSTATES 10
#define MAX_HW_PSTATES 10


struct cpupower_cpu_info {
struct cpupower_cpu_info {
+19 −3
Original line number Original line Diff line number Diff line
@@ -2,11 +2,14 @@


#include "helpers/helpers.h"
#include "helpers/helpers.h"


#define MSR_AMD_HWCR	0xc0010015

int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
			int *states)
			int *states)
{
{
	struct cpupower_cpu_info cpu_info;
	struct cpupower_cpu_info cpu_info;
	int ret;
	int ret;
	unsigned long long val;


	*support = *active = *states = 0;
	*support = *active = *states = 0;


@@ -16,9 +19,22 @@ int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,


	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) {
	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) {
		*support = 1;
		*support = 1;

		/* AMD Family 0x17 does not utilize PCI D18F4 like prior
		 * families and has no fixed discrete boost states but
		 * has Hardware determined variable increments instead.
		 */

		if (cpu_info.family == 0x17) {
			if (!read_msr(cpu, MSR_AMD_HWCR, &val)) {
				if (!(val & CPUPOWER_AMD_CPBDIS))
					*active = 1;
			}
		} else {
			ret = amd_pci_get_num_boost_states(active, states);
			ret = amd_pci_get_num_boost_states(active, states);
			if (ret)
			if (ret)
				return ret;
				return ret;
		}
	} else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA)
	} else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA)
		*support = *active = 1;
		*support = *active = 1;
	return 0;
	return 0;