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Commit 8fe35742 authored by Kazuya Mizuguchi's avatar Kazuya Mizuguchi Committed by Geert Uytterhoeven
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clk: renesas: r8a7796: Add Sound SSI clock 



This patch adds SSI(all) and SSI{0,1,2,3,4,5,6,7,8,9} clocks for R8A7796
SoC.

Signed-off-by: default avatarKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 7cb1ce26

drivers/clk/renesas/r8a7796-cpg-mssr.c

+11 −0
Original line number Diff line number Diff line
@@ -208,6 +208,17 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { 
	DEF_MOD("i2c2",			 929,	R8A7796_CLK_S3D2),

	DEF_MOD("i2c1",			 930,	R8A7796_CLK_S3D2),

	DEF_MOD("i2c0",			 931,	R8A7796_CLK_S3D2),

	DEF_MOD("ssi-all",		1005,	R8A7796_CLK_S3D4),

	DEF_MOD("ssi9",			1006,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi8",			1007,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi7",			1008,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi6",			1009,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi5",			1010,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi4",			1011,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi3",			1012,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi2",			1013,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi1",			1014,	MOD_CLK_ID(1005)),

	DEF_MOD("ssi0",			1015,	MOD_CLK_ID(1005)),

};



static const unsigned int r8a7796_crit_mod_clks[] __initconst = {