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Commit 8f63fc2b authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Zhi Wang
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drm/i915/gvt: properly check per_ctx bb valid state 



Need to check valid state for per_ctx bb and bypass batch buffer
combine for scan if necessary. Otherwise adding invalid MI batch
buffer start cmd for per_ctx bb will cause scan failure, which is
taken as -EFAULT now so vGPU would be put in failsafe. This trys
to fix that by checking per_ctx bb valid state. Also remove old
invalid WARNING that indirect ctx bb shouldn't depend on valid
per_ctx bb.

Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
parent 7277f755

drivers/gpu/drm/i915/gvt/cmd_parser.c

+3 −0
Original line number Diff line number Diff line
@@ -2723,6 +2723,9 @@ static int combine_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) 
	uint32_t per_ctx_start[CACHELINE_DWORDS] = {0};

	unsigned char *bb_start_sva;



	if (!wa_ctx->per_ctx.valid)

		return 0;



	per_ctx_start[0] = 0x18800001;

	per_ctx_start[1] = wa_ctx->per_ctx.guest_gma;

drivers/gpu/drm/i915/gvt/execlist.c

+1 −2
Original line number Diff line number Diff line
@@ -701,8 +701,7 @@ static int submit_context(struct intel_vgpu *vgpu, int ring_id, 
			CACHELINE_BYTES;

		workload->wa_ctx.per_ctx.guest_gma =

			per_ctx & PER_CTX_ADDR_MASK;



		WARN_ON(workload->wa_ctx.indirect_ctx.size && !(per_ctx & 0x1));

		workload->wa_ctx.per_ctx.valid = per_ctx & 1;

	}



	if (emulate_schedule_in)

drivers/gpu/drm/i915/gvt/scheduler.h

+1 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ struct shadow_indirect_ctx { 
struct shadow_per_ctx {

	unsigned long guest_gma;

	unsigned long shadow_gma;

	unsigned valid;

};



struct intel_shadow_wa_ctx {