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Commit 8f40842e authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'for-linus-20160324' of git://git.infradead.org/linux-mtd 

Pull MTD updates from Brian Norris:
 "NAND:
   - Add sunxi_nand randomizer support
   - begin refactoring NAND ecclayout structs
   - fix pxa3xx_nand dmaengine usage
   - brcmnand: fix support for v7.1 controller
   - add Qualcomm NAND controller driver

  SPI NOR:
   - add new ls1021a, ls2080a support to Freescale QuadSPI
   - add new flash ID entries
   - support bottom-block protection for Winbond flash
   - support Status Register Write Protect
   - remove broken QPI support for Micron SPI flash

  JFFS2:
   - improve post-mount CRC scan efficiency

  General:
   - refactor bcm63xxpart parser, to later extend for NAND
   - add writebuf size parameter to mtdram

  Other minor code quality improvements"

* tag 'for-linus-20160324' of git://git.infradead.org/linux-mtd: (72 commits)
  mtd: nand: remove kerneldoc for removed function parameter
  mtd: nand: Qualcomm NAND controller driver
  dt/bindings: qcom_nandc: Add DT bindings
  mtd: nand: don't select chip in nand_chip's block_bad op
  mtd: spi-nor: support lock/unlock for a few Winbond chips
  mtd: spi-nor: add TB (Top/Bottom) protect support
  mtd: spi-nor: add SPI_NOR_HAS_LOCK flag
  mtd: spi-nor: use BIT() for flash_info flags
  mtd: spi-nor: disallow further writes to SR if WP# is low
  mtd: spi-nor: make lock/unlock bounds checks more obvious and robust
  mtd: spi-nor: silently drop lock/unlock for already locked/unlocked region
  mtd: spi-nor: wait for SR_WIP to clear on initial unlock
  mtd: nand: simplify nand_bch_init() usage
  mtd: mtdswap: remove useless if (!mtd->ecclayout) test
  mtd: create an mtd_oobavail() helper and make use of it
  mtd: kill the ecclayout->oobavail field
  mtd: nand: check status before reporting timeout
  mtd: bcm63xxpart: give width specifier an 'int', not 'size_t'
  mtd: mtdram: Add parameter for setting writebuf size
  mtd: nand: pxa3xx_nand: kill unused field 'drcmr_cmd'
  ...
parents 88875667 6871c1b9

Documentation/devicetree/bindings/mtd/atmel-nand.txt

+18 −13
Original line number Original line Diff line number Diff line 
Atmel NAND flash

Atmel NAND flash





Required properties:

Required properties:

- compatible : should be "atmel,at91rm9200-nand" or "atmel,sama5d4-nand".

- compatible: The possible values are:

	"atmel,at91rm9200-nand"

	"atmel,sama5d2-nand"

	"atmel,sama5d4-nand"

- reg : should specify localbus address and size used for the chip,

- reg : should specify localbus address and size used for the chip,

	and hardware ECC controller if available.

	and hardware ECC controller if available.

	If the hardware ECC is PMECC, it should contain address and size for

	If the hardware ECC is PMECC, it should contain address and size for
@@ -21,10 +24,11 @@ Optional properties: 
- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.

- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.

  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",

  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",

  "soft_bch".

  "soft_bch".

- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware.

- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,

  Only supported by at91sam9x5 or later sam9 product.

  capable of BCH encoding and decoding, on devices where it is present.

- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC

- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC

  Controller. Supported values are: 2, 4, 8, 12, 24.

  Controller. Supported values are: 2, 4, 8, 12, 24. If the compatible string

  is "atmel,sama5d2-nand", 32 is also valid.

- atmel,pmecc-sector-size : sector size for ECC computation. Supported values

- atmel,pmecc-sector-size : sector size for ECC computation. Supported values

  are: 512, 1024.

  are: 512, 1024.

- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM

- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
@@ -32,15 +36,16 @@ Optional properties: 
  sector size 1024. If not specified, driver will build the table in runtime.

  sector size 1024. If not specified, driver will build the table in runtime.

- nand-bus-width : 8 or 16 bus width if not present 8

- nand-bus-width : 8 or 16 bus width if not present 8

- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

- Nand Flash Controller(NFC) is a slave driver under Atmel nand flash



  - Required properties:

Nand Flash Controller(NFC) is an optional sub-node

    - compatible : "atmel,sama5d3-nfc".

Required properties:

- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc".

- reg : should specify the address and size used for NFC command registers,

- reg : should specify the address and size used for NFC command registers,

            NFC registers and NFC Sram. NFC Sram address and size can be absent

        NFC registers and NFC SRAM. NFC SRAM address and size can be absent

        if don't want to use it.

        if don't want to use it.

- clocks: phandle to the peripheral clock

- clocks: phandle to the peripheral clock

  - Optional properties:

Optional properties:

    - atmel,write-by-sram: boolean to enable NFC write by sram.

- atmel,write-by-sram: boolean to enable NFC write by SRAM.





Examples:

Examples:

nand0: nand@40000000,0 {

nand0: nand@40000000,0 {

Documentation/devicetree/bindings/mtd/fsl-quadspi.txt

+4 −1
Original line number Original line Diff line number Diff line
@@ -3,7 +3,9 @@ 
Required properties:

Required properties:

  - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",

  - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",

		 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",

		 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",

		 "fsl,ls1021-qspi"

		 "fsl,ls1021a-qspi"

		 or

		 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi"

  - reg : the first contains the register location and length,

  - reg : the first contains the register location and length,

          the second contains the memory mapping address and length

          the second contains the memory mapping address and length

  - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"

  - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"
@@ -19,6 +21,7 @@ Optional properties: 
			      But if there are two NOR flashes connected to the

			      But if there are two NOR flashes connected to the

			      bus, you should enable this property.

			      bus, you should enable this property.

			      (Please check the board's schematic.)

			      (Please check the board's schematic.)

  - big-endian : That means the IP register is big endian





Example:

Example:

Documentation/devicetree/bindings/mtd/qcom_nandc.txt

0 → 100644
+86 −0
Original line number Original line Diff line number Diff line 
* Qualcomm NAND controller



Required properties:

- compatible:		should be "qcom,ipq806x-nand"

- reg:			MMIO address range

- clocks:		must contain core clock and always on clock

- clock-names:		must contain "core" for the core clock and "aon" for the

			always on clock

- dmas:			DMA specifier, consisting of a phandle to the ADM DMA

			controller node and the channel number to be used for

			NAND. Refer to dma.txt and qcom_adm.txt for more details

- dma-names:		must be "rxtx"

- qcom,cmd-crci:	must contain the ADM command type CRCI block instance

			number specified for the NAND controller on the given

			platform

- qcom,data-crci:	must contain the ADM data type CRCI block instance

			number specified for the NAND controller on the given

			platform

- #address-cells:	<1> - subnodes give the chip-select number

- #size-cells:		<0>



* NAND chip-select



Each controller may contain one or more subnodes to represent enabled

chip-selects which (may) contain NAND flash chips. Their properties are as

follows.



Required properties:

- compatible:		should contain "qcom,nandcs"

- reg:			a single integer representing the chip-select

			number (e.g., 0, 1, 2, etc.)

- #address-cells:	see partition.txt

- #size-cells:		see partition.txt

- nand-ecc-strength:	see nand.txt

- nand-ecc-step-size:	must be 512. see nand.txt for more details.



Optional properties:

- nand-bus-width:	see nand.txt



Each nandcs device node may optionally contain a 'partitions' sub-node, which

further contains sub-nodes describing the flash partition mapping. See

partition.txt for more detail.



Example:



nand@1ac00000 {

	compatible = "qcom,ebi2-nandc";

	reg = <0x1ac00000 0x800>;



	clocks = <&gcc EBI2_CLK>,

		 <&gcc EBI2_AON_CLK>;

	clock-names = "core", "aon";



	dmas = <&adm_dma 3>;

	dma-names = "rxtx";

	qcom,cmd-crci = <15>;

	qcom,data-crci = <3>;



	#address-cells = <1>;

	#size-cells = <0>;



	nandcs@0 {

		compatible = "qcom,nandcs";

		reg = <0>;



		nand-ecc-strength = <4>;

		nand-ecc-step-size = <512>;

		nand-bus-width = <8>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "boot-nand";

				reg = <0 0x58a0000>;

			};



			partition@58a0000 {

				label = "fs-nand";

				reg = <0x58a0000 0x4000000>;

			};

		};

	};

};

arch/arm/plat-samsung/devs.c

+0 −9
Original line number Original line Diff line number Diff line
@@ -727,15 +727,6 @@ static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) 
			return -ENOMEM;

			return -ENOMEM;

	}

	}





	if (set->ecc_layout) {

		ptr = kmemdup(set->ecc_layout,

			      sizeof(struct nand_ecclayout), GFP_KERNEL);

		set->ecc_layout = ptr;



		if (!ptr)

			return -ENOMEM;

	}



	return 0;

	return 0;

}

}

arch/mips/include/asm/mach-jz4740/jz4740_nand.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -25,8 +25,6 @@ struct jz_nand_platform_data { 
	int			num_partitions;

	int			num_partitions;

	struct mtd_partition	*partitions;

	struct mtd_partition	*partitions;





	struct nand_ecclayout	*ecc_layout;



	unsigned char banks[JZ_NAND_NUM_BANKS];

	unsigned char banks[JZ_NAND_NUM_BANKS];





	void (*ident_callback)(struct platform_device *, struct nand_chip *,

	void (*ident_callback)(struct platform_device *, struct nand_chip *,