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Commit 8f061891 authored by Tomas Winkler's avatar Tomas Winkler Committed by John W. Linville
Browse files

iwlwifi: setup correctly L1 L0S pi link values 



This patch setups L1 L0S pci link values.

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 885ba202

drivers/net/wireless/iwlwifi/iwl-4965-hw.h

+6 −1
Original line number Diff line number Diff line
@@ -100,9 +100,14 @@ 


#include "iwl-commands.h"



#define PCI_LINK_CTRL      0x0F0

/* PCI registers */

#define PCI_LINK_CTRL      0x0F0	/* 1 byte */

#define PCI_POWER_SOURCE   0x0C8

#define PCI_REG_WUM8       0x0E8



/* PCI register values */

#define PCI_LINK_VAL_L0S_EN	0x01

#define PCI_LINK_VAL_L1_EN	0x02

#define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT         (0x80000000)



#define TFD_QUEUE_SIZE_MAX      (256)

drivers/net/wireless/iwlwifi/iwl-4965.c

+14 −4
Original line number Diff line number Diff line
@@ -496,6 +496,10 @@ static int iwl4965_apm_init(struct iwl_priv *priv) 
	iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,

			  CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);



	/* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */

	iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,

			  CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);



	/* set "initialization complete" bit to move adapter

	 * D0U* --> D0A* state */

	iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
@@ -514,11 +518,12 @@ static int iwl4965_apm_init(struct iwl_priv *priv) 
		goto out;



	/* enable DMA */

	iwl_write_prph(priv, APMG_CLK_CTRL_REG,

			APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);

	iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |

						APMG_CLK_VAL_BSM_CLK_RQT);



	udelay(20);



	/* disable L1-Active */

	iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,

			  APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
@@ -546,8 +551,13 @@ static void iwl4965_nic_config(struct iwl_priv *priv) 


	pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);



	/* disable L1 entry -- workaround for pre-B1 */

	pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);

	/* L1 is enabled by BIOS */

	if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)

		/* diable L0S disabled L1A enabled */

		iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);

	else

		/* L0S enabled L1A disabled */

		iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);



	radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);

drivers/net/wireless/iwlwifi/iwl-5000.c

+14 −5
Original line number Diff line number Diff line
@@ -63,6 +63,10 @@ static int iwl5000_apm_init(struct iwl_priv *priv) 
	iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,

		    CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);



	/* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */

	iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,

		    CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);



	iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);



	/* set "initialization complete" bit to move adapter
@@ -83,11 +87,11 @@ static int iwl5000_apm_init(struct iwl_priv *priv) 
		return ret;



	/* enable DMA */

	iwl_write_prph(priv, APMG_CLK_EN_REG,

			APMG_CLK_VAL_DMA_CLK_RQT);

	iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);



	udelay(20);



	/* disable L1-Active */

	iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,

			  APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
@@ -106,8 +110,13 @@ static void iwl5000_nic_config(struct iwl_priv *priv) 


	pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);



	/* disable L1 entry -- workaround for pre-B1 */

	pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);

	/* L1 is enabled by BIOS */

	if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)

		/* diable L0S disabled L1A enabled */

		iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);

	else

		/* L0S enabled L1A disabled */

		iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);



	radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);

drivers/net/wireless/iwlwifi/iwl-csr.h

+5 −1
Original line number Diff line number Diff line
@@ -87,13 +87,14 @@ 
/* EEPROM reads */

#define CSR_EEPROM_REG          (CSR_BASE+0x02c)

#define CSR_EEPROM_GP           (CSR_BASE+0x030)

#define CSR_GIO_REG		(CSR_BASE+0x03C)

#define CSR_GP_UCODE		(CSR_BASE+0x044)

#define CSR_UCODE_DRV_GP1       (CSR_BASE+0x054)

#define CSR_UCODE_DRV_GP1_SET   (CSR_BASE+0x058)

#define CSR_UCODE_DRV_GP1_CLR   (CSR_BASE+0x05c)

#define CSR_UCODE_DRV_GP2       (CSR_BASE+0x060)

#define CSR_GIO_CHICKEN_BITS    (CSR_BASE+0x100)

#define CSR_LED_REG             (CSR_BASE+0x094)

#define CSR_GIO_CHICKEN_BITS    (CSR_BASE+0x100)



/* Analog phase-lock-loop configuration  */

#define CSR_ANA_PLL_CFG         (CSR_BASE+0x20c)
@@ -213,6 +214,9 @@ 
#define CSR_EEPROM_GP_BAD_SIGNATURE	(0x00000000)

#define CSR_EEPROM_GP_IF_OWNER_MSK	(0x00000180)



/* CSR GIO */

#define CSR_GIO_REG_VAL_L0S_ENABLED	(0x00000002)



/* UCODE DRV GP */

#define CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP             (0x00000001)

#define CSR_UCODE_SW_BIT_RFKILL                     (0x00000002)