Merge "ARM: dts: msm: Update iommu configuration for wlan"

	qcom,icnss@18800000 {

		compatible = "qcom,icnss";

		reg = <0x18800000 0x800000>,

		      <0xa0000000 0x10000000>,

		      <0xb0000000 0x10000>;

		reg-names = "membase", "smmu_iova_base", "smmu_iova_ipa";

		reg-names = "membase", "smmu_iova_ipa";

		iommus = <&anoc2_smmu 0x1a00>,

			 <&anoc2_smmu 0x1a01>;

		clocks = <&clock_rpmcc RPM_SMD_RF_CLK1_PIN>;

			     <0 423 IRQ_TYPE_LEVEL_HIGH>,   /* CE9 */

			     <0 424 IRQ_TYPE_LEVEL_HIGH>,   /* CE10 */

			     <0 425 IRQ_TYPE_LEVEL_HIGH>;   /* CE11 */

		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;

		qcom,iommu-dma = "bypass";

		qcom,iommu-faults = "stall-disable";

		qcom,hyp_enabled;

		vdd-cx-mx-supply = <&pm660_l5>;

		vdd-1.8-xo-supply = <&pm660_l9_pin_ctrl>;

		vdd-1.3-rfa-supply = <&pm660_l6_pin_ctrl>;

		qcom,vdd-3.3-ch0-config = <3200000 3400000>;

		qcom,wlan-msa-memory = <0x100000>;

		qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;

		qcom,smmu-s1-bypass;

		qcom,smp2p_map_wlan_1_in {

			interrupts-extended = <&smp2p_wlan_1_in 0 0>,

						<&smp2p_wlan_1_in 1 0>;