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Commit 8e401aba authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable ULPS for command mode panels on Kona"

parents 9a34d8eb 5d0312f6
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+53 −1
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 */

&mdss_mdp {
@@ -275,6 +275,58 @@
				qcom,mdss-dsc-bit-per-pixel = <8>;
				qcom,mdss-dsc-block-prediction-enable;
			};

			timing@2 {
				qcom,mdss-dsi-panel-width = <2520>;
				qcom,mdss-dsi-panel-height = <2160>;
				qcom,mdss-dsi-h-front-porch = <30>;
				qcom,mdss-dsi-h-back-porch = <100>;
				qcom,mdss-dsi-h-pulse-width = <4>;
				qcom,mdss-dsi-h-sync-skew = <0>;
				qcom,mdss-dsi-v-back-porch = <7>;
				qcom,mdss-dsi-v-front-porch = <8>;
				qcom,mdss-dsi-v-pulse-width = <1>;
				qcom,mdss-dsi-h-sync-pulse = <0>;
				qcom,mdss-dsi-panel-framerate = <120>;

				qcom,mdss-dsi-on-command = [
					39 01 00 00 00 00 11 91 09 20 00 20 02
					00 03 1c 04 21 00
					0f 03 19 01 97
					39 01 00 00 00 00 03 92 10 f0
					15 01 00 00 00 00 02 90 03
					15 01 00 00 00 00 02 03 01
					39 01 00 00 00 00 06 f0 55 aa 52 08 04
					15 01 00 00 00 00 02 c0 03
					39 01 00 00 00 00 06 f0 55 aa 52 08 07
					15 01 00 00 00 00 02 ef 01
					39 01 00 00 00 00 06 f0 55 aa 52 08 00
					15 01 00 00 00 00 02 b4 01
					15 01 00 00 00 00 02 35 00
					39 01 00 00 00 00 06 f0 55 aa 52 08 01
					39 01 00 00 00 00 05 ff aa 55 a5 80
					15 01 00 00 00 00 02 6f 01
					15 01 00 00 00 00 02 f3 10
					39 01 00 00 00 00 05 ff aa 55 a5 00
					/* sleep out + delay 120ms */
					05 01 00 00 78 00 01 11
					/* display on + delay 120ms */
					05 01 00 00 78 00 01 29
					];
				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
				qcom,mdss-dsi-off-command =
					[05 01 00 00 78 00 02 28 00
					 05 01 00 00 78 00 02 10 00];
				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";

				qcom,compression-mode = "dsc";
				qcom,mdss-dsc-slice-height = <1080>;
				qcom,mdss-dsc-slice-width = <1260>;
				qcom,mdss-dsc-slice-per-pkt = <2>;
				qcom,mdss-dsc-bit-per-component = <10>;
				qcom,mdss-dsc-bit-per-pixel = <8>;
				qcom,mdss-dsc-block-prediction-enable;
			};
		};
	};
};
+36 −0
Original line number Diff line number Diff line
@@ -245,6 +245,42 @@
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_sim_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_sim_vid {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_sim_dsc_375_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_dual_sim_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_dual_sim_vid {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_dual_sim_dsc_375_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
};
+145 −0
Original line number Diff line number Diff line
@@ -13,6 +13,12 @@
#include "dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi"
#include "dsi-panel-nt35695b-truly-fhd-cmd.dtsi"
#include "dsi-panel-nt35695b-truly-fhd-video.dtsi"
#include "dsi-panel-sim-cmd.dtsi"
#include "dsi-panel-sim-video.dtsi"
#include "dsi-panel-sim-dsc375-cmd.dtsi"
#include "dsi-panel-sim-dualmipi-cmd.dtsi"
#include "dsi-panel-sim-dualmipi-video.dtsi"
#include "dsi-panel-sim-dualmipi-dsc375-cmd.dtsi"
#include <dt-bindings/clock/mdss-7nm-pll-clk.h>

&tlmm {
@@ -156,6 +162,7 @@

/* PHY TIMINGS REVISION W */
&dsi_sw43404_amoled_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 14 05 05 1f 1e 05
@@ -178,6 +185,7 @@
};

&dsi_sw43404_amoled_fhd_plus_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 12 04 04 1e 1e 04
@@ -189,6 +197,7 @@
};

&dsi_sharp_4k_dsc_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
@@ -211,6 +220,7 @@
};

&dsi_sharp_1080_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1E 08 08 24 22 08
@@ -223,6 +233,7 @@
};

&dsi_dual_nt35597_truly_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
@@ -245,6 +256,7 @@
};

&dsi_nt35695b_truly_fhd_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22
@@ -265,3 +277,136 @@
		};
	};
};

&dsi_sim_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <1 1 1>,
						<2 2 1>;
			qcom,default-topology-index = <1>;
			qcom,panel-roi-alignment = <720 40 720 40 720 40>;
			qcom,partial-update-enabled = "single_roi";
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <1 1 1>,
						<2 2 1>;
			qcom,default-topology-index = <1>;
			qcom,panel-roi-alignment = <540 40 540 40 540 40>;
			qcom,partial-update-enabled = "single_roi";
		};

		timing@2 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <1 1 1>,
						<2 2 1>;
			qcom,default-topology-index = <1>;
			qcom,panel-roi-alignment = <360 40 360 40 360 40>;
			qcom,partial-update-enabled = "single_roi";
		};
	};
};

&dsi_sim_vid {
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <1 0 1>,
						<2 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_sim_dsc_375_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 { /* 1080p */
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};

		timing@1 { /* qhd */
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
				08 05 02 04 00 19 18];
			qcom,display-topology = <1 1 1>,
						<2 2 1>, /* dsc merge */
						<2 1 1>; /* 3d mux */
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_dual_sim_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 26 24 09
				09 06 02 04 00 18 17];
			qcom,display-topology = <2 0 2>;
			qcom,default-topology-index = <0>;
		};

		timing@1 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <2 0 2>,
						<1 0 2>;
			qcom,default-topology-index = <0>;
		};

		timing@2 {
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
				08 05 02 04 00 19 18];
			qcom,display-topology = <2 0 2>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_dual_sim_vid {
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <2 0 2>,
						<1 0 2>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_dual_sim_dsc_375_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-display-timings {
		timing@0 { /* qhd */
			qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
				07 05 02 04 00 18 17];
			qcom,display-topology = <2 2 2>;
			qcom,default-topology-index = <0>;
		};

		timing@1 { /* 4k */
			qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
				08 05 02 04 00 19 18];
			qcom,display-topology = <2 2 2>;
			qcom,default-topology-index = <0>;
		};

		timing@2 { /* 5k */
			qcom,mdss-dsi-panel-phy-timings = [00 46 13 14 33 30 12
				14 0e 02 04 00 37 22];
			qcom,display-topology = <2 2 2>;
			qcom,default-topology-index = <0>;
		};
	};
};