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Commit 8d22e8f6 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "arm64: Apply erratum 1024718 to Kryo5xx Cores"

parents 911059ef ba96b3af

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ 
#define ARM_CPU_PART_CORTEX_A75		0xD0A

#define ARM_CPU_PART_CORTEX_A35		0xD04

#define ARM_CPU_PART_CORTEX_A55		0xD05

#define ARM_CPU_PART_KRYO5S		0x805



#define APM_CPU_PART_POTENZA		0x000
@@ -110,6 +111,7 @@ 
#define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75)

#define MIDR_CORTEX_A35 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A35)

#define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55)

#define MIDR_KRYO5S	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO5S)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

arch/arm64/kernel/cpufeature.c

+1 −0
Original line number Diff line number Diff line
@@ -956,6 +956,7 @@ static bool cpu_has_broken_dbm(void) 
	static const struct midr_range cpus[] = {

#ifdef CONFIG_ARM64_ERRATUM_1024718

		MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0),  // A55 r0p0 -r1p0

		MIDR_RANGE(MIDR_KRYO5S, 13, 14, 13, 14),

#endif

		{},

	};