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Commit 8a6e5b5c authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Make sure gpu-speed-bin-vectors has the correct size"

parents e4860cf8 514df4e8
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+51 −1
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved.
 * Copyright (c) 2002,2007-2021, The Linux Foundation. All rights reserved.
 */
#include <linux/delay.h>
#include <linux/input.h>
@@ -240,6 +240,56 @@ int adreno_efuse_read_u32(struct adreno_device *adreno_dev, unsigned int offset,
	return 0;
}

void adreno_efuse_speed_bin_array(struct adreno_device *adreno_dev)
{
	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
	int ret, count, i = 0;
	unsigned int val, vector_size = 3;
	unsigned int *bin_vector;

	/*
	 * Here count is no of 32 bit elements in the
	 * speed-bin-vector array. If there are two fuses
	 * i.e If no of fuses are 2 then no of elements will be
	 * 2 * 3 = 6(elements of 32 bit each).
	 */
	count = of_property_count_u32_elems(device->pdev->dev.of_node,
				"qcom,gpu-speed-bin-vectors");

	if ((count <= 0) || (count % vector_size))
		return;

	bin_vector = kmalloc_array(count, sizeof(unsigned int), GFP_KERNEL);
	if (bin_vector == NULL)
		return;

	if (of_property_read_u32_array(device->pdev->dev.of_node,
			"qcom,gpu-speed-bin-vectors",
			bin_vector, count)) {
		dev_err(device->dev,
				"Speed-bin-vectors is invalid\n");
		kfree(bin_vector);
		return;
	}

	/*
	 * Final value of adreno_dev->speed_bin is the value formed by
	 * OR'ing the values read from all the fuses.
	 */
	while (i < count) {
		ret = adreno_efuse_read_u32(adreno_dev, bin_vector[i], &val);

		if (ret < 0)
			break;

		adreno_dev->speed_bin |= (val & bin_vector[i+1])
				>> bin_vector[i+2];
		i += vector_size;
	}

	kfree(bin_vector);
}

static int _get_counter(struct adreno_device *adreno_dev,
		int group, int countable, unsigned int *lo,
		unsigned int *hi)
+1 −0
Original line number Diff line number Diff line
@@ -1108,6 +1108,7 @@ int adreno_efuse_map(struct adreno_device *adreno_dev);
int adreno_efuse_read_u32(struct adreno_device *adreno_dev, unsigned int offset,
		unsigned int *val);
void adreno_efuse_unmap(struct adreno_device *adreno_dev);
void adreno_efuse_speed_bin_array(struct adreno_device *adreno_dev);

bool adreno_is_cx_dbgc_register(struct kgsl_device *device,
		unsigned int offset);
+22 −2
Original line number Diff line number Diff line
@@ -89,14 +89,34 @@ static void a530_efuse_speed_bin(struct adreno_device *adreno_dev)
	adreno_dev->speed_bin = (val & speed_bin[1]) >> speed_bin[2];
}

static void a5xx_efuse_speed_bin(struct adreno_device *adreno_dev)
{
	unsigned int val;
	unsigned int speed_bin[3];
	struct kgsl_device *device = &adreno_dev->dev;

	if (of_get_property(device->pdev->dev.of_node,
			"qcom,gpu-speed-bin-vectors", NULL)) {
		adreno_efuse_speed_bin_array(adreno_dev);
		return;
	}

	if (!of_property_read_u32_array(device->pdev->dev.of_node,
			"qcom,gpu-speed-bin", speed_bin, 3)) {
		adreno_efuse_read_u32(adreno_dev, speed_bin[0], &val);
		adreno_dev->speed_bin = (val & speed_bin[1]) >> speed_bin[2];
		return;
	}
}

static const struct {
	int (*check)(struct adreno_device *adreno_dev);
	void (*func)(struct adreno_device *adreno_dev);
} a5xx_efuse_funcs[] = {
	{ adreno_is_a530, a530_efuse_leakage },
	{ adreno_is_a530, a530_efuse_speed_bin },
	{ adreno_is_a504, a530_efuse_speed_bin },
	{ adreno_is_a505, a530_efuse_speed_bin },
	{ adreno_is_a504, a5xx_efuse_speed_bin },
	{ adreno_is_a505, a5xx_efuse_speed_bin },
	{ adreno_is_a512, a530_efuse_speed_bin },
	{ adreno_is_a508, a530_efuse_speed_bin },
};