Loading drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h +5 −0 Original line number Diff line number Diff line Loading @@ -82,6 +82,11 @@ enum iwl_data_path_subcmd_ids { */ TRIGGER_RX_QUEUES_NOTIF_CMD = 0x2, /** * @STA_HE_CTXT_CMD: &struct iwl_he_sta_context_cmd */ STA_HE_CTXT_CMD = 0x7, /** * @TLC_MNG_CONFIG_CMD: &struct iwl_tlc_config_cmd */ Loading drivers/net/wireless/intel/iwlwifi/fw/api/mac.h +172 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ * * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as Loading @@ -28,6 +29,7 @@ * * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without Loading Loading @@ -279,6 +281,10 @@ enum iwl_mac_filter_flags { MAC_FILTER_OUT_BCAST = BIT(8), MAC_FILTER_IN_CRC32 = BIT(11), MAC_FILTER_IN_PROBE_REQUEST = BIT(12), /** * @MAC_FILTER_IN_11AX: mark BSS as supporting 802.11ax */ MAC_FILTER_IN_11AX = BIT(14), }; /** Loading Loading @@ -406,4 +412,170 @@ struct iwl_missed_beacons_notif { __le32 num_recvd_beacons; } __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */ /** * struct iwl_he_backoff_conf - used for backoff configuration * Per each trigger-based AC, (set by MU EDCA Parameter set info-element) * used for backoff configuration of TXF5..TXF8 trigger based. * The MU-TIMER is reloaded w/ MU_TIME each time a frame from the AC is sent via * trigger-based TX. * @cwmin: CW min * @cwmax: CW max * @aifsn: AIFSN * AIFSN=0, means that no backoff from the specified TRIG-BASED AC is * allowed till the MU-TIMER is 0 * @mu_time: MU time in 8TU units */ struct iwl_he_backoff_conf { __le16 cwmin; __le16 cwmax; __le16 aifsn; __le16 mu_time; } __packed; /* AC_QOS_DOT11AX_API_S */ #define MAX_HE_SUPP_NSS 2 #define MAX_HE_CHANNEL_BW_INDX 4 /** * struct iwl_he_pkt_ext - QAM thresholds * The required PPE is set via HE Capabilities IE, per Nss x BW x MCS * The IE is organized in the following way: * Support for Nss x BW (or RU) matrix: * (0=SISO, 1=MIMO2) x (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) * Each entry contains 2 QAM thresholds for 8us and 16us: * 0=BPSK, 1=QPSK, 2=16QAM, 3=64QAM, 4=256QAM, 5=1024QAM, 6/7=RES * i.e. QAM_th1 < QAM_th2 such if TX uses QAM_tx: * QAM_tx < QAM_th1 --> PPE=0us * QAM_th1 <= QAM_tx < QAM_th2 --> PPE=8us * QAM_th2 <= QAM_tx --> PPE=16us * @pkt_ext_qam_th: QAM thresholds * For each Nss/Bw define 2 QAM thrsholds (0..5) * For rates below the low_th, no need for PPE * For rates between low_th and high_th, need 8us PPE * For rates equal or higher then the high_th, need 16us PPE * Nss (0-siso, 1-mimo2) x BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) x * (0-low_th, 1-high_th) */ struct iwl_he_pkt_ext { u8 pkt_ext_qam_th[MAX_HE_SUPP_NSS][MAX_HE_CHANNEL_BW_INDX][2]; } __packed; /* PKT_EXT_DOT11AX_API_S */ /** * enum iwl_he_sta_ctxt_flags - HE STA context flags * @STA_CTXT_HE_REF_BSSID_VALID: ref bssid addr valid (for receiving specific * control frames such as TRIG, NDPA, BACK) * @STA_CTXT_HE_BSS_COLOR_DIS: BSS color disable, don't use the BSS * color for RX filter but use MAC header * @STA_CTXT_HE_PARTIAL_BSS_COLOR: partial BSS color allocation * @STA_CTXT_HE_32BIT_BA_BITMAP: indicates the receiver supports BA bitmap * of 32-bits * @STA_CTXT_HE_PACKET_EXT: indicates that the packet-extension info is valid * and should be used * @STA_CTXT_HE_TRIG_RND_ALLOC: indicates that trigger based random allocation * is enabled according to UORA element existence * @STA_CTXT_HE_CONST_TRIG_RND_ALLOC: used for AV testing * @STA_CTXT_HE_ACK_ENABLED: indicates that the AP supports receiving ACK- * enabled AGG, i.e. both BACK and non-BACK frames in a single AGG * @STA_CTXT_HE_MU_EDCA_CW: indicates that there is an element of MU EDCA * parameter set, i.e. the backoff counters for trig-based ACs */ enum iwl_he_sta_ctxt_flags { STA_CTXT_HE_REF_BSSID_VALID = BIT(4), STA_CTXT_HE_BSS_COLOR_DIS = BIT(5), STA_CTXT_HE_PARTIAL_BSS_COLOR = BIT(6), STA_CTXT_HE_32BIT_BA_BITMAP = BIT(7), STA_CTXT_HE_PACKET_EXT = BIT(8), STA_CTXT_HE_TRIG_RND_ALLOC = BIT(9), STA_CTXT_HE_CONST_TRIG_RND_ALLOC = BIT(10), STA_CTXT_HE_ACK_ENABLED = BIT(11), STA_CTXT_HE_MU_EDCA_CW = BIT(12), }; /** * enum iwl_he_htc_flags - HE HTC support flags * @IWL_HE_HTC_SUPPORT: HE-HTC support * @IWL_HE_HTC_UL_MU_RESP_SCHED: HE UL MU response schedule * support via A-control field * @IWL_HE_HTC_BSR_SUPP: BSR support in A-control field * @IWL_HE_HTC_OMI_SUPP: A-OMI support in A-control field * @IWL_HE_HTC_BQR_SUPP: A-BQR support in A-control field */ enum iwl_he_htc_flags { IWL_HE_HTC_SUPPORT = BIT(0), IWL_HE_HTC_UL_MU_RESP_SCHED = BIT(3), IWL_HE_HTC_BSR_SUPP = BIT(4), IWL_HE_HTC_OMI_SUPP = BIT(5), IWL_HE_HTC_BQR_SUPP = BIT(6), }; /* * @IWL_HE_HTC_LINK_ADAP_NO_FEEDBACK: the STA does not provide HE MFB * @IWL_HE_HTC_LINK_ADAP_UNSOLICITED: the STA provides only unsolicited HE MFB * @IWL_HE_HTC_LINK_ADAP_BOTH: the STA is capable of providing HE MFB in * response to HE MRQ and if the STA provides unsolicited HE MFB */ #define IWL_HE_HTC_LINK_ADAP_POS (1) #define IWL_HE_HTC_LINK_ADAP_NO_FEEDBACK (0) #define IWL_HE_HTC_LINK_ADAP_UNSOLICITED (2 << IWL_HE_HTC_LINK_ADAP_POS) #define IWL_HE_HTC_LINK_ADAP_BOTH (3 << IWL_HE_HTC_LINK_ADAP_POS) /** * struct iwl_he_sta_context_cmd - configure FW to work with HE AP * @sta_id: STA id * @tid_limit: max num of TIDs in TX HE-SU multi-TID agg * 0 - bad value, 1 - multi-tid not supported, 2..8 - tid limit * @reserved1: reserved byte for future use * @reserved2: reserved byte for future use * @flags: see %iwl_11ax_sta_ctxt_flags * @ref_bssid_addr: reference BSSID used by the AP * @reserved0: reserved 2 bytes for aligning the ref_bssid_addr field to 8 bytes * @htc_flags: which features are supported in HTC * @frag_flags: frag support in A-MSDU * @frag_level: frag support level * @frag_max_num: max num of "open" MSDUs in the receiver (in power of 2) * @frag_min_size: min frag size (except last frag) * @pkt_ext: optional, exists according to PPE-present bit in the HE-PHY capa * @bss_color: 11ax AP ID that is used in the HE SIG-A to mark inter BSS frame * @htc_trig_based_pkt_ext: default PE in 4us units * @frame_time_rts_th: HE duration RTS threshold, in units of 32us * @rand_alloc_ecwmin: random CWmin = 2**ECWmin-1 * @rand_alloc_ecwmax: random CWmax = 2**ECWmax-1 * @reserved3: reserved byte for future use * @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues */ struct iwl_he_sta_context_cmd { u8 sta_id; u8 tid_limit; u8 reserved1; u8 reserved2; __le32 flags; /* The below fields are set via Multiple BSSID IE */ u8 ref_bssid_addr[6]; __le16 reserved0; /* The below fields are set via HE-capabilities IE */ __le32 htc_flags; u8 frag_flags; u8 frag_level; u8 frag_max_num; u8 frag_min_size; /* The below fields are set via PPE thresholds element */ struct iwl_he_pkt_ext pkt_ext; /* The below fields are set via HE-Operation IE */ u8 bss_color; u8 htc_trig_based_pkt_ext; __le16 frame_time_rts_th; /* Random access parameter set (i.e. RAPS) */ u8 rand_alloc_ecwmin; u8 rand_alloc_ecwmax; __le16 reserved3; /* The below fields are set via MU EDCA parameter set element */ struct iwl_he_backoff_conf trig_based_txf[AC_NUM]; } __packed; /* STA_CONTEXT_DOT11AX_API_S */ #endif /* __iwl_fw_api_mac_h__ */ drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h +3 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,6 @@ struct iwl_nvm_get_info_general { * @NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED: true if 5.2 band enabled * @NVM_MAC_SKU_FLAGS_802_11N_ENABLED: true if 11n enabled * @NVM_MAC_SKU_FLAGS_802_11AC_ENABLED: true if 11ac enabled * @NVM_MAC_SKU_FLAGS_802_11AX_ENABLED: true if 11ax enabled * @NVM_MAC_SKU_FLAGS_MIMO_DISABLED: true if MIMO disabled * @NVM_MAC_SKU_FLAGS_WAPI_ENABLED: true if WAPI enabled * @NVM_MAC_SKU_FLAGS_REG_CHECK_ENABLED: true if regulatory checker enabled Loading @@ -206,6 +205,9 @@ enum iwl_nvm_mac_sku_flags { NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED = BIT(1), NVM_MAC_SKU_FLAGS_802_11N_ENABLED = BIT(2), NVM_MAC_SKU_FLAGS_802_11AC_ENABLED = BIT(3), /** * @NVM_MAC_SKU_FLAGS_802_11AX_ENABLED: true if 11ax enabled */ NVM_MAC_SKU_FLAGS_802_11AX_ENABLED = BIT(4), NVM_MAC_SKU_FLAGS_MIMO_DISABLED = BIT(5), NVM_MAC_SKU_FLAGS_WAPI_ENABLED = BIT(8), Loading drivers/net/wireless/intel/iwlwifi/fw/api/rs.h +30 −6 Original line number Diff line number Diff line Loading @@ -314,8 +314,11 @@ enum { IWL_RATE_MCS_8_INDEX, IWL_RATE_MCS_9_INDEX, IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, IWL_RATE_MCS_10_INDEX, IWL_RATE_MCS_11_INDEX, IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1, IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, }; #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) Loading Loading @@ -440,8 +443,8 @@ enum { #define RATE_LEGACY_RATE_MSK 0xff /* Bit 10 - OFDM HE */ #define RATE_MCS_OFDM_HE_POS 10 #define RATE_MCS_OFDM_HE_MSK BIT(RATE_MCS_OFDM_HE_POS) #define RATE_MCS_HE_POS 10 #define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS) /* * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz Loading Loading @@ -482,15 +485,33 @@ enum { #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) /* * Bit 20-21: HE guard interval and LTF type. * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us, * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us * Bit 20-21: HE LTF type and guard interval * HE (ext) SU: * 0 1xLTF+0.8us * 1 2xLTF+0.8us * 2 2xLTF+1.6us * 3 & SGI (bit 13) clear 4xLTF+3.2us * 3 & SGI (bit 13) set 4xLTF+0.8us * HE MU: * 0 4xLTF+0.8us * 1 2xLTF+0.8us * 2 2xLTF+1.6us * 3 4xLTF+3.2us * HE TRIG: * 0 1xLTF+1.6us * 1 2xLTF+1.6us * 2 4xLTF+3.2us * 3 (does not occur) */ #define RATE_MCS_HE_GI_LTF_POS 20 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ #define RATE_MCS_HE_TYPE_POS 22 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ Loading @@ -501,6 +522,9 @@ enum { #define RATE_MCS_LDPC_POS 27 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ #define RATE_MCS_HE_106T_POS 28 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) /* Link Quality definitions */ Loading drivers/net/wireless/intel/iwlwifi/fw/api/rx.h +47 −6 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2015 - 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as Loading @@ -30,6 +31,7 @@ * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2015 - 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without Loading Loading @@ -343,6 +345,37 @@ enum iwl_rx_mpdu_mac_info { IWL_RX_MPDU_PHY_PHY_INDEX_MASK = 0xf0, }; /* * enum iwl_rx_he_phy - HE PHY data */ enum iwl_rx_he_phy { IWL_RX_HE_PHY_BEAM_CHNG = BIT(0), IWL_RX_HE_PHY_UPLINK = BIT(1), IWL_RX_HE_PHY_BSS_COLOR_MASK = 0xfc, IWL_RX_HE_PHY_SPATIAL_REUSE_MASK = 0xf00, IWL_RX_HE_PHY_SU_EXT_BW10 = BIT(12), IWL_RX_HE_PHY_TXOP_DUR_MASK = 0xfe000, IWL_RX_HE_PHY_LDPC_EXT_SYM = BIT(20), IWL_RX_HE_PHY_PRE_FEC_PAD_MASK = 0x600000, IWL_RX_HE_PHY_PE_DISAMBIG = BIT(23), IWL_RX_HE_PHY_DOPPLER = BIT(24), /* 6 bits reserved */ IWL_RX_HE_PHY_DELIM_EOF = BIT(31), /* second dword - MU data */ IWL_RX_HE_PHY_SIGB_COMPRESSION = BIT_ULL(32 + 0), IWL_RX_HE_PHY_SIBG_SYM_OR_USER_NUM_MASK = 0x1e00000000ULL, IWL_RX_HE_PHY_HE_LTF_NUM_MASK = 0xe000000000ULL, IWL_RX_HE_PHY_RU_ALLOC_SEC80 = BIT_ULL(32 + 8), /* trigger encoded */ IWL_RX_HE_PHY_RU_ALLOC_MASK = 0xfe0000000000ULL, IWL_RX_HE_PHY_SIGB_MCS_MASK = 0xf000000000000ULL, /* 1 bit reserved */ IWL_RX_HE_PHY_SIGB_DCM = BIT_ULL(32 + 21), IWL_RX_HE_PHY_PREAMBLE_PUNC_TYPE_MASK = 0xc0000000000000ULL, /* 8 bits reserved */ }; /** * struct iwl_rx_mpdu_desc - RX MPDU descriptor */ Loading Loading @@ -438,12 +471,20 @@ struct iwl_rx_mpdu_desc { */ __le32 gp2_on_air_rise; /* DW12 & DW13 */ union { /** * @tsf_on_air_rise: * TSF value on air rise (INA), only valid if * %IWL_RX_MPDU_PHY_TSF_OVERLOAD isn't set */ __le64 tsf_on_air_rise; /** * @he_phy_data: * HE PHY data, see &enum iwl_rx_he_phy, valid * only if %IWL_RX_MPDU_PHY_TSF_OVERLOAD is set */ __le64 he_phy_data; }; } __packed; struct iwl_frame_release { Loading Loading
drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h +5 −0 Original line number Diff line number Diff line Loading @@ -82,6 +82,11 @@ enum iwl_data_path_subcmd_ids { */ TRIGGER_RX_QUEUES_NOTIF_CMD = 0x2, /** * @STA_HE_CTXT_CMD: &struct iwl_he_sta_context_cmd */ STA_HE_CTXT_CMD = 0x7, /** * @TLC_MNG_CONFIG_CMD: &struct iwl_tlc_config_cmd */ Loading
drivers/net/wireless/intel/iwlwifi/fw/api/mac.h +172 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ * * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as Loading @@ -28,6 +29,7 @@ * * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without Loading Loading @@ -279,6 +281,10 @@ enum iwl_mac_filter_flags { MAC_FILTER_OUT_BCAST = BIT(8), MAC_FILTER_IN_CRC32 = BIT(11), MAC_FILTER_IN_PROBE_REQUEST = BIT(12), /** * @MAC_FILTER_IN_11AX: mark BSS as supporting 802.11ax */ MAC_FILTER_IN_11AX = BIT(14), }; /** Loading Loading @@ -406,4 +412,170 @@ struct iwl_missed_beacons_notif { __le32 num_recvd_beacons; } __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */ /** * struct iwl_he_backoff_conf - used for backoff configuration * Per each trigger-based AC, (set by MU EDCA Parameter set info-element) * used for backoff configuration of TXF5..TXF8 trigger based. * The MU-TIMER is reloaded w/ MU_TIME each time a frame from the AC is sent via * trigger-based TX. * @cwmin: CW min * @cwmax: CW max * @aifsn: AIFSN * AIFSN=0, means that no backoff from the specified TRIG-BASED AC is * allowed till the MU-TIMER is 0 * @mu_time: MU time in 8TU units */ struct iwl_he_backoff_conf { __le16 cwmin; __le16 cwmax; __le16 aifsn; __le16 mu_time; } __packed; /* AC_QOS_DOT11AX_API_S */ #define MAX_HE_SUPP_NSS 2 #define MAX_HE_CHANNEL_BW_INDX 4 /** * struct iwl_he_pkt_ext - QAM thresholds * The required PPE is set via HE Capabilities IE, per Nss x BW x MCS * The IE is organized in the following way: * Support for Nss x BW (or RU) matrix: * (0=SISO, 1=MIMO2) x (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) * Each entry contains 2 QAM thresholds for 8us and 16us: * 0=BPSK, 1=QPSK, 2=16QAM, 3=64QAM, 4=256QAM, 5=1024QAM, 6/7=RES * i.e. QAM_th1 < QAM_th2 such if TX uses QAM_tx: * QAM_tx < QAM_th1 --> PPE=0us * QAM_th1 <= QAM_tx < QAM_th2 --> PPE=8us * QAM_th2 <= QAM_tx --> PPE=16us * @pkt_ext_qam_th: QAM thresholds * For each Nss/Bw define 2 QAM thrsholds (0..5) * For rates below the low_th, no need for PPE * For rates between low_th and high_th, need 8us PPE * For rates equal or higher then the high_th, need 16us PPE * Nss (0-siso, 1-mimo2) x BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) x * (0-low_th, 1-high_th) */ struct iwl_he_pkt_ext { u8 pkt_ext_qam_th[MAX_HE_SUPP_NSS][MAX_HE_CHANNEL_BW_INDX][2]; } __packed; /* PKT_EXT_DOT11AX_API_S */ /** * enum iwl_he_sta_ctxt_flags - HE STA context flags * @STA_CTXT_HE_REF_BSSID_VALID: ref bssid addr valid (for receiving specific * control frames such as TRIG, NDPA, BACK) * @STA_CTXT_HE_BSS_COLOR_DIS: BSS color disable, don't use the BSS * color for RX filter but use MAC header * @STA_CTXT_HE_PARTIAL_BSS_COLOR: partial BSS color allocation * @STA_CTXT_HE_32BIT_BA_BITMAP: indicates the receiver supports BA bitmap * of 32-bits * @STA_CTXT_HE_PACKET_EXT: indicates that the packet-extension info is valid * and should be used * @STA_CTXT_HE_TRIG_RND_ALLOC: indicates that trigger based random allocation * is enabled according to UORA element existence * @STA_CTXT_HE_CONST_TRIG_RND_ALLOC: used for AV testing * @STA_CTXT_HE_ACK_ENABLED: indicates that the AP supports receiving ACK- * enabled AGG, i.e. both BACK and non-BACK frames in a single AGG * @STA_CTXT_HE_MU_EDCA_CW: indicates that there is an element of MU EDCA * parameter set, i.e. the backoff counters for trig-based ACs */ enum iwl_he_sta_ctxt_flags { STA_CTXT_HE_REF_BSSID_VALID = BIT(4), STA_CTXT_HE_BSS_COLOR_DIS = BIT(5), STA_CTXT_HE_PARTIAL_BSS_COLOR = BIT(6), STA_CTXT_HE_32BIT_BA_BITMAP = BIT(7), STA_CTXT_HE_PACKET_EXT = BIT(8), STA_CTXT_HE_TRIG_RND_ALLOC = BIT(9), STA_CTXT_HE_CONST_TRIG_RND_ALLOC = BIT(10), STA_CTXT_HE_ACK_ENABLED = BIT(11), STA_CTXT_HE_MU_EDCA_CW = BIT(12), }; /** * enum iwl_he_htc_flags - HE HTC support flags * @IWL_HE_HTC_SUPPORT: HE-HTC support * @IWL_HE_HTC_UL_MU_RESP_SCHED: HE UL MU response schedule * support via A-control field * @IWL_HE_HTC_BSR_SUPP: BSR support in A-control field * @IWL_HE_HTC_OMI_SUPP: A-OMI support in A-control field * @IWL_HE_HTC_BQR_SUPP: A-BQR support in A-control field */ enum iwl_he_htc_flags { IWL_HE_HTC_SUPPORT = BIT(0), IWL_HE_HTC_UL_MU_RESP_SCHED = BIT(3), IWL_HE_HTC_BSR_SUPP = BIT(4), IWL_HE_HTC_OMI_SUPP = BIT(5), IWL_HE_HTC_BQR_SUPP = BIT(6), }; /* * @IWL_HE_HTC_LINK_ADAP_NO_FEEDBACK: the STA does not provide HE MFB * @IWL_HE_HTC_LINK_ADAP_UNSOLICITED: the STA provides only unsolicited HE MFB * @IWL_HE_HTC_LINK_ADAP_BOTH: the STA is capable of providing HE MFB in * response to HE MRQ and if the STA provides unsolicited HE MFB */ #define IWL_HE_HTC_LINK_ADAP_POS (1) #define IWL_HE_HTC_LINK_ADAP_NO_FEEDBACK (0) #define IWL_HE_HTC_LINK_ADAP_UNSOLICITED (2 << IWL_HE_HTC_LINK_ADAP_POS) #define IWL_HE_HTC_LINK_ADAP_BOTH (3 << IWL_HE_HTC_LINK_ADAP_POS) /** * struct iwl_he_sta_context_cmd - configure FW to work with HE AP * @sta_id: STA id * @tid_limit: max num of TIDs in TX HE-SU multi-TID agg * 0 - bad value, 1 - multi-tid not supported, 2..8 - tid limit * @reserved1: reserved byte for future use * @reserved2: reserved byte for future use * @flags: see %iwl_11ax_sta_ctxt_flags * @ref_bssid_addr: reference BSSID used by the AP * @reserved0: reserved 2 bytes for aligning the ref_bssid_addr field to 8 bytes * @htc_flags: which features are supported in HTC * @frag_flags: frag support in A-MSDU * @frag_level: frag support level * @frag_max_num: max num of "open" MSDUs in the receiver (in power of 2) * @frag_min_size: min frag size (except last frag) * @pkt_ext: optional, exists according to PPE-present bit in the HE-PHY capa * @bss_color: 11ax AP ID that is used in the HE SIG-A to mark inter BSS frame * @htc_trig_based_pkt_ext: default PE in 4us units * @frame_time_rts_th: HE duration RTS threshold, in units of 32us * @rand_alloc_ecwmin: random CWmin = 2**ECWmin-1 * @rand_alloc_ecwmax: random CWmax = 2**ECWmax-1 * @reserved3: reserved byte for future use * @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues */ struct iwl_he_sta_context_cmd { u8 sta_id; u8 tid_limit; u8 reserved1; u8 reserved2; __le32 flags; /* The below fields are set via Multiple BSSID IE */ u8 ref_bssid_addr[6]; __le16 reserved0; /* The below fields are set via HE-capabilities IE */ __le32 htc_flags; u8 frag_flags; u8 frag_level; u8 frag_max_num; u8 frag_min_size; /* The below fields are set via PPE thresholds element */ struct iwl_he_pkt_ext pkt_ext; /* The below fields are set via HE-Operation IE */ u8 bss_color; u8 htc_trig_based_pkt_ext; __le16 frame_time_rts_th; /* Random access parameter set (i.e. RAPS) */ u8 rand_alloc_ecwmin; u8 rand_alloc_ecwmax; __le16 reserved3; /* The below fields are set via MU EDCA parameter set element */ struct iwl_he_backoff_conf trig_based_txf[AC_NUM]; } __packed; /* STA_CONTEXT_DOT11AX_API_S */ #endif /* __iwl_fw_api_mac_h__ */
drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h +3 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,6 @@ struct iwl_nvm_get_info_general { * @NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED: true if 5.2 band enabled * @NVM_MAC_SKU_FLAGS_802_11N_ENABLED: true if 11n enabled * @NVM_MAC_SKU_FLAGS_802_11AC_ENABLED: true if 11ac enabled * @NVM_MAC_SKU_FLAGS_802_11AX_ENABLED: true if 11ax enabled * @NVM_MAC_SKU_FLAGS_MIMO_DISABLED: true if MIMO disabled * @NVM_MAC_SKU_FLAGS_WAPI_ENABLED: true if WAPI enabled * @NVM_MAC_SKU_FLAGS_REG_CHECK_ENABLED: true if regulatory checker enabled Loading @@ -206,6 +205,9 @@ enum iwl_nvm_mac_sku_flags { NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED = BIT(1), NVM_MAC_SKU_FLAGS_802_11N_ENABLED = BIT(2), NVM_MAC_SKU_FLAGS_802_11AC_ENABLED = BIT(3), /** * @NVM_MAC_SKU_FLAGS_802_11AX_ENABLED: true if 11ax enabled */ NVM_MAC_SKU_FLAGS_802_11AX_ENABLED = BIT(4), NVM_MAC_SKU_FLAGS_MIMO_DISABLED = BIT(5), NVM_MAC_SKU_FLAGS_WAPI_ENABLED = BIT(8), Loading
drivers/net/wireless/intel/iwlwifi/fw/api/rs.h +30 −6 Original line number Diff line number Diff line Loading @@ -314,8 +314,11 @@ enum { IWL_RATE_MCS_8_INDEX, IWL_RATE_MCS_9_INDEX, IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, IWL_RATE_MCS_10_INDEX, IWL_RATE_MCS_11_INDEX, IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1, IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, }; #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) Loading Loading @@ -440,8 +443,8 @@ enum { #define RATE_LEGACY_RATE_MSK 0xff /* Bit 10 - OFDM HE */ #define RATE_MCS_OFDM_HE_POS 10 #define RATE_MCS_OFDM_HE_MSK BIT(RATE_MCS_OFDM_HE_POS) #define RATE_MCS_HE_POS 10 #define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS) /* * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz Loading Loading @@ -482,15 +485,33 @@ enum { #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) /* * Bit 20-21: HE guard interval and LTF type. * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us, * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us * Bit 20-21: HE LTF type and guard interval * HE (ext) SU: * 0 1xLTF+0.8us * 1 2xLTF+0.8us * 2 2xLTF+1.6us * 3 & SGI (bit 13) clear 4xLTF+3.2us * 3 & SGI (bit 13) set 4xLTF+0.8us * HE MU: * 0 4xLTF+0.8us * 1 2xLTF+0.8us * 2 2xLTF+1.6us * 3 4xLTF+3.2us * HE TRIG: * 0 1xLTF+1.6us * 1 2xLTF+1.6us * 2 4xLTF+3.2us * 3 (does not occur) */ #define RATE_MCS_HE_GI_LTF_POS 20 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ #define RATE_MCS_HE_TYPE_POS 22 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ Loading @@ -501,6 +522,9 @@ enum { #define RATE_MCS_LDPC_POS 27 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ #define RATE_MCS_HE_106T_POS 28 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) /* Link Quality definitions */ Loading
drivers/net/wireless/intel/iwlwifi/fw/api/rx.h +47 −6 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2015 - 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as Loading @@ -30,6 +31,7 @@ * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2015 - 2017 Intel Deutschland GmbH * Copyright(c) 2018 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without Loading Loading @@ -343,6 +345,37 @@ enum iwl_rx_mpdu_mac_info { IWL_RX_MPDU_PHY_PHY_INDEX_MASK = 0xf0, }; /* * enum iwl_rx_he_phy - HE PHY data */ enum iwl_rx_he_phy { IWL_RX_HE_PHY_BEAM_CHNG = BIT(0), IWL_RX_HE_PHY_UPLINK = BIT(1), IWL_RX_HE_PHY_BSS_COLOR_MASK = 0xfc, IWL_RX_HE_PHY_SPATIAL_REUSE_MASK = 0xf00, IWL_RX_HE_PHY_SU_EXT_BW10 = BIT(12), IWL_RX_HE_PHY_TXOP_DUR_MASK = 0xfe000, IWL_RX_HE_PHY_LDPC_EXT_SYM = BIT(20), IWL_RX_HE_PHY_PRE_FEC_PAD_MASK = 0x600000, IWL_RX_HE_PHY_PE_DISAMBIG = BIT(23), IWL_RX_HE_PHY_DOPPLER = BIT(24), /* 6 bits reserved */ IWL_RX_HE_PHY_DELIM_EOF = BIT(31), /* second dword - MU data */ IWL_RX_HE_PHY_SIGB_COMPRESSION = BIT_ULL(32 + 0), IWL_RX_HE_PHY_SIBG_SYM_OR_USER_NUM_MASK = 0x1e00000000ULL, IWL_RX_HE_PHY_HE_LTF_NUM_MASK = 0xe000000000ULL, IWL_RX_HE_PHY_RU_ALLOC_SEC80 = BIT_ULL(32 + 8), /* trigger encoded */ IWL_RX_HE_PHY_RU_ALLOC_MASK = 0xfe0000000000ULL, IWL_RX_HE_PHY_SIGB_MCS_MASK = 0xf000000000000ULL, /* 1 bit reserved */ IWL_RX_HE_PHY_SIGB_DCM = BIT_ULL(32 + 21), IWL_RX_HE_PHY_PREAMBLE_PUNC_TYPE_MASK = 0xc0000000000000ULL, /* 8 bits reserved */ }; /** * struct iwl_rx_mpdu_desc - RX MPDU descriptor */ Loading Loading @@ -438,12 +471,20 @@ struct iwl_rx_mpdu_desc { */ __le32 gp2_on_air_rise; /* DW12 & DW13 */ union { /** * @tsf_on_air_rise: * TSF value on air rise (INA), only valid if * %IWL_RX_MPDU_PHY_TSF_OVERLOAD isn't set */ __le64 tsf_on_air_rise; /** * @he_phy_data: * HE PHY data, see &enum iwl_rx_he_phy, valid * only if %IWL_RX_MPDU_PHY_TSF_OVERLOAD is set */ __le64 he_phy_data; }; } __packed; struct iwl_frame_release { Loading
Luca Coelho <luciano.coelho@intel.com>Luca Coelho <luciano.coelho@intel.com>