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Commit 8a444474 authored by Guennadi Liakhovetski's avatar Guennadi Liakhovetski Committed by Simon Horman
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ARM: shmobile: sh73a0: fix Z and ZG clock hierarchy 



Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1.

Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 342ab874

arch/arm/mach-shmobile/clock-sh73a0.c

+2 −2
Original line number Diff line number Diff line
@@ -265,12 +265,12 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, 


static struct clk div4_clks[DIV4_NR] = {

	[DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT),

	[DIV4_ZG] = DIV4(FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT),

	[DIV4_ZG] = SH_CLK_DIV4(&pll0_clk, FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT),

	[DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT),

	[DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT),

	[DIV4_M1] = DIV4(FRQCRA, 4, 0x1dff, 0),

	[DIV4_M2] = DIV4(FRQCRA, 0, 0x1dff, 0),

	[DIV4_Z] = DIV4(FRQCRB, 24, 0x97f, 0),

	[DIV4_Z] = SH_CLK_DIV4(&pll0_clk, FRQCRB, 24, 0x97f, 0),

	[DIV4_ZTR] = DIV4(FRQCRB, 20, 0xdff, 0),

	[DIV4_ZT] = DIV4(FRQCRB, 16, 0xdff, 0),

	[DIV4_ZX] = DIV4(FRQCRB, 12, 0xdff, 0),