Merge tag 'perf-core-for-mingo' of...

	 * If we have rb pages ensure they're a power-of-two number, so we

	 * can do bitmasks instead of modulo.

	 */

	if (nr_pages != 0 && !is_power_of_2(nr_pages))

	if (!is_power_of_2(nr_pages))

		return -EINVAL;

	if (vma_size != PAGE_SIZE * (1 + nr_pages))

###

# build: Generic definitions

#

#  Lots of this code have been borrowed or heavily inspired from parts

#  of kbuild code, which is not credited, but mostly developed by:

#

#  Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015

#  Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015

#

###

# Convenient variables

comma   := ,

squote  := '

###

# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o

dot-target = $(dir $@).$(notdir $@)

###

# filename of target with directory and extension stripped

basetarget = $(basename $(notdir $@))

###

# The temporary file to save gcc -MD generated dependencies must not

# contain a comma

depfile = $(subst $(comma),_,$(dot-target).d)

###

# Check if both arguments has same arguments. Result is empty string if equal.

arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \

                    $(filter-out $(cmd_$@),   $(cmd_$(1))) )

###

# Escape single quote for use in echo statements

escsq = $(subst $(squote),'\$(squote)',$1)

# Echo command

# Short version is used, if $(quiet) equals `quiet_', otherwise full one.

echo-cmd = $(if $($(quiet)cmd_$(1)),\

           echo '  $(call escsq,$($(quiet)cmd_$(1)))';)

###

# Replace >$< with >$$< to preserve $ when reloading the .cmd file

# (needed for make)

# Replace >#< with >\#< to avoid starting a comment in the .cmd file

# (needed for make)

# Replace >'< with >'\''< to be able to enclose the whole string in '...'

# (needed for the shell)

make-cmd = $(call escsq,$(subst \#,\\\#,$(subst $$,$$$$,$(cmd_$(1)))))

###

# Find any prerequisites that is newer than target or that does not exist.

# PHONY targets skipped in both cases.

any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)

###

# if_changed_dep  - execute command if any prerequisite is newer than

#                   target, or command line has changed and update

#                   dependencies in the cmd file

if_changed_dep = $(if $(strip $(any-prereq) $(arg-check)),         \

	@set -e;                                                   \

	$(echo-cmd) $(cmd_$(1));                                   \

	cat $(depfile) > $(dot-target).cmd;                        \

	printf '%s\n' 'cmd_$@ := $(make-cmd)' >> $(dot-target).cmd)

# if_changed      - execute command if any prerequisite is newer than

#                   target, or command line has changed

if_changed = $(if $(strip $(any-prereq) $(arg-check)),             \

	@set -e;                                                   \

	$(echo-cmd) $(cmd_$(1));                                   \

	printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd)

###

# C flags to be used in rule definitions, includes:

# - depfile generation

# - global $(CFLAGS)

# - per target C flags

# - per object C flags

# - BUILD_STR macro to allow '-D"$(variable)"' constructs

c_flags = -Wp,-MD,$(depfile),-MT,$@ $(CFLAGS) -D"BUILD_STR(s)=\#s" $(CFLAGS_$(basetarget).o) $(CFLAGS_$(obj))

Build Framework

===============

The perf build framework was adopted from the kernel build system, hence the

idea and the way how objects are built is the same.

Basically the user provides set of 'Build' files that list objects and

directories to nest for specific target to be build.

Unlike the kernel we don't have a single build object 'obj-y' list that where

we setup source objects, but we support more. This allows one 'Build' file to

carry a sources list for multiple build objects.

a) Build framework makefiles

----------------------------

The build framework consists of 2 Makefiles:

  Build.include

  Makefile.build

While the 'Build.include' file contains just some generic definitions, the

'Makefile.build' file is the makefile used from the outside. It's

interface/usage is following:

  $ make -f tools/build/Makefile srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)

where:

  KSRC   - is the path to kernel sources

  DIR    - is the path to the project to be built

  OBJECT - is the name of the build object

When succefully finished the $(DIR) directory contains the final object file

called $(OBJECT)-in.o:

  $ ls $(DIR)/$(OBJECT)-in.o

which includes all compiled sources described in 'Build' makefiles.

a) Build makefiles

------------------

The user supplies 'Build' makefiles that contains a objects list, and connects

the build to nested directories.

Assume we have the following project structure:

  ex/a.c

    /b.c

    /c.c

    /d.c

    /arch/e.c

    /arch/f.c

Out of which you build the 'ex' binary ' and the 'libex.a' library:

  'ex'      - consists of 'a.o', 'b.o' and libex.a

  'libex.a' - consists of 'c.o', 'd.o', 'e.o' and 'f.o'

The build framework does not create the 'ex' and 'libex.a' binaries for you, it

only prepares proper objects to be compiled and grouped together.

To follow the above example, the user provides following 'Build' files:

  ex/Build:

    ex-y += a.o

    ex-y += b.o

    libex-y += c.o

    libex-y += d.o

    libex-y += arch/

  ex/arch/Build:

    libex-y += e.o

    libex-y += f.o

and runs:

  $ make -f tools/build/Makefile.build dir=. obj=ex

  $ make -f tools/build/Makefile.build dir=. obj=libex

which creates the following objects:

  ex/ex-in.o

  ex/libex-in.o

that contain request objects names in Build files.

It's only a matter of 2 single commands to create the final binaries:

  $ ar  rcs libex.a libex-in.o

  $ gcc -o ex ex-in.o libex.a

You can check the 'ex' example in 'tools/build/tests/ex' for more details.

b) Rules

--------

The build framework provides standard compilation rules to handle .S and .c

compilation.

It's possible to include special rule if needed (like we do for flex or bison

code generation).

c) CFLAGS

---------

It's possible to alter the standard object C flags in the following way:

  CFLAGS_perf.o += '...' - alters CFLAGS for perf.o object

  CFLAGS_gtk += '...'    - alters CFLAGS for gtk build object

This C flags changes has the scope of the Build makefile they are defined in.

d) Dependencies

---------------

For each built object file 'a.o' the '.a.cmd' is created and holds:

  - Command line used to built that object

    (for each object)

  - Dependency rules generated by 'gcc -Wp,-MD,...'

    (for compiled object)

All existing '.cmd' files are included in the Build process to follow properly

the dependencies and trigger a rebuild when necessary.

e) Single rules

---------------

It's possible to build single object file by choice, like:

  $ make util/map.o    # objects

  $ make util/map.i    # preprocessor

  $ make util/map.s    # assembly

###

# Main build makefile.

#

#  Lots of this code have been borrowed or heavily inspired from parts

#  of kbuild code, which is not credited, but mostly developed by:

#

#  Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015

#  Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015

#

PHONY := __build

__build:

ifeq ($(V),1)

  quiet =

  Q =

else

  quiet=quiet_

  Q=@

endif

build-dir := $(srctree)/tools/build

# Generic definitions

include $(build-dir)/Build.include

# do not force detected configuration

-include .config-detected

# Init all relevant variables used in build files so

# 1) they have correct type

# 2) they do not inherit any value from the environment

subdir-y     :=

obj-y        :=

subdir-y     :=

subdir-obj-y :=

# Build definitions

build-file := $(dir)/Build

include $(build-file)

quiet_cmd_flex  = FLEX     $@

quiet_cmd_bison = BISON    $@

# Create directory unless it exists

quiet_cmd_mkdir = MKDIR    $(dir $@)

      cmd_mkdir = mkdir -p $(dir $@)

     rule_mkdir = $(if $(wildcard $(dir $@)),,@$(call echo-cmd,mkdir) $(cmd_mkdir))

# Compile command

quiet_cmd_cc_o_c = CC       $@

      cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

quiet_cmd_cc_i_c = CPP      $@

      cmd_cc_i_c = $(CC) $(c_flags) -E -o $@ $<

quiet_cmd_cc_s_c = AS       $@

      cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<

# Link agregate command

# If there's nothing to link, create empty $@ object.

quiet_cmd_ld_multi = LD       $@

      cmd_ld_multi = $(if $(strip $(obj-y)),\

		       $(LD) -r -o $@ $(obj-y),rm -f $@; $(AR) rcs $@)

# Build rules

$(OUTPUT)%.o: %.c FORCE

	$(call rule_mkdir)

	$(call if_changed_dep,cc_o_c)

$(OUTPUT)%.o: %.S FORCE

	$(call rule_mkdir)

	$(call if_changed_dep,cc_o_c)

$(OUTPUT)%.i: %.c FORCE

	$(call rule_mkdir)

	$(call if_changed_dep,cc_i_c)

$(OUTPUT)%.i: %.S FORCE

	$(call rule_mkdir)

	$(call if_changed_dep,cc_i_c)

$(OUTPUT)%.s: %.c FORCE

	$(call rule_mkdir)

	$(call if_changed_dep,cc_s_c)

# Gather build data:

#   obj-y        - list of build objects

#   subdir-y     - list of directories to nest

#   subdir-obj-y - list of directories objects 'dir/$(obj)-in.o'

obj-y        := $($(obj)-y)

subdir-y     := $(patsubst %/,%,$(filter %/, $(obj-y)))

obj-y        := $(patsubst %/, %/$(obj)-in.o, $(obj-y))

subdir-obj-y := $(filter %/$(obj)-in.o, $(obj-y))

# '$(OUTPUT)/dir' prefix to all objects

prefix       := $(subst ./,,$(OUTPUT)$(dir)/)

obj-y        := $(addprefix $(prefix),$(obj-y))

subdir-obj-y := $(addprefix $(prefix),$(subdir-obj-y))

# Final '$(obj)-in.o' object

in-target := $(prefix)$(obj)-in.o

PHONY += $(subdir-y)

$(subdir-y):

	$(Q)$(MAKE) -f $(build-dir)/Makefile.build dir=$(dir)/$@ obj=$(obj)

$(sort $(subdir-obj-y)): $(subdir-y) ;

$(in-target): $(obj-y) FORCE

	$(call rule_mkdir)

	$(call if_changed,ld_multi)

__build: $(in-target)

	@:

PHONY += FORCE

FORCE:

# Include all cmd files to get all the dependency rules

# for all objects included

targets   := $(wildcard $(sort $(obj-y) $(in-target) $(MAKECMDGOALS)))

cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)

  include $(cmd_files)

endif

.PHONY: $(PHONY)

ex-y += ex.o

ex-y += a.o

ex-y += b.o

ex-y += empty/

libex-y += c.o

libex-y += d.o

libex-y += arch/