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Commit 8a13398c authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

drm/omap: add dispc_ops 



We want to change the dispc API from plain functions to a struct with
functions pointers, so that omapdrm can call either omapdss or omapdss6
depending on the platform.

This patch adds 'struct dispc_ops' and adds functions to omapdss-base
to set and get the ops.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent c283400a

drivers/gpu/drm/omapdrm/dss/base.c

+13 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#include <linux/module.h>



static bool dss_initialized;

static const struct dispc_ops *ops;



void omapdss_set_is_initialized(bool set)

{
@@ -15,6 +16,18 @@ bool omapdss_is_initialized(void) 
}

EXPORT_SYMBOL(omapdss_is_initialized);



void dispc_set_ops(const struct dispc_ops *o)

{

	ops = o;

}

EXPORT_SYMBOL(dispc_set_ops);



const struct dispc_ops *dispc_get_ops(void)

{

	return ops;

}

EXPORT_SYMBOL(dispc_get_ops);



MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");

MODULE_DESCRIPTION("OMAP Display Subsystem Base");

MODULE_LICENSE("GPL v2");

drivers/gpu/drm/omapdrm/dss/omapdss.h

+50 −0
Original line number Diff line number Diff line
@@ -929,4 +929,54 @@ int dss_mgr_register_framedone_handler(enum omap_channel channel, 
void dss_mgr_unregister_framedone_handler(enum omap_channel channel,

		void (*handler)(void *), void *data);



/* dispc ops */



struct dispc_ops {

	u32 (*read_irqstatus)(void);

	void (*clear_irqstatus)(u32 mask);

	u32 (*read_irqenable)(void);

	void (*write_irqenable)(u32 mask);



	int (*request_irq)(irq_handler_t handler, void *dev_id);

	void (*free_irq)(void *dev_id);



	int (*runtime_get)(void);

	void (*runtime_put)(void);



	int (*get_num_ovls)(void);

	int (*get_num_mgrs)(void);



	void (*mgr_enable)(enum omap_channel channel, bool enable);

	bool (*mgr_is_enabled)(enum omap_channel channel);

	u32 (*mgr_get_vsync_irq)(enum omap_channel channel);

	u32 (*mgr_get_framedone_irq)(enum omap_channel channel);

	u32 (*mgr_get_sync_lost_irq)(enum omap_channel channel);

	bool (*mgr_go_busy)(enum omap_channel channel);

	void (*mgr_go)(enum omap_channel channel);

	void (*mgr_set_lcd_config)(enum omap_channel channel,

			const struct dss_lcd_mgr_config *config);

	void (*mgr_set_timings)(enum omap_channel channel,

			const struct videomode *vm);

	void (*mgr_setup)(enum omap_channel channel,

			const struct omap_overlay_manager_info *info);

	enum omap_dss_output_id (*mgr_get_supported_outputs)(enum omap_channel channel);

	u32 (*mgr_gamma_size)(enum omap_channel channel);

	void (*mgr_set_gamma)(enum omap_channel channel,

		const struct drm_color_lut *lut,

		unsigned int length);



	int (*ovl_enable)(enum omap_plane plane, bool enable);

	bool (*ovl_enabled)(enum omap_plane plane);

	void (*ovl_set_channel_out)(enum omap_plane plane,

			enum omap_channel channel);

	int (*ovl_setup)(enum omap_plane plane, const struct omap_overlay_info *oi,

			bool replication, const struct videomode *vm,

			bool mem_to_mem);



	enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane plane);

};



void dispc_set_ops(const struct dispc_ops *o);

const struct dispc_ops *dispc_get_ops(void);



#endif /* __OMAP_DRM_DSS_H */