Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 89cd72f2 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "disp: msm: sde: increase rsc min_threshold time"

parents 8fa5e65d bfd98d4d
Loading
Loading
Loading
Loading
+4 −3
Original line number Diff line number Diff line
@@ -37,10 +37,11 @@
/**
 * rsc_min_threshold will be set to MIN_THRESHOLD_OVERHEAD_TIME which
 * takes into account back off time + overhead from RSC/RSC_WRAPPER. The
 * overhead buffer time is required to be greater than 14. For measure,
 * this value assumes 18.
 * overhead buffer time is required to be greater than 14. Program it
 * with a higher value (3.3 ms), so it has sufficient time to complete
 * the sequence in rare cases.
 */
#define MIN_THRESHOLD_OVERHEAD_TIME	18
#define MIN_THRESHOLD_OVERHEAD_TIME	64

#define DEFAULT_PANEL_FPS		60
#define DEFAULT_PANEL_JITTER_NUMERATOR	2
+7 −2
Original line number Diff line number Diff line
@@ -872,14 +872,19 @@ int rsc_hw_tcs_wait(struct sde_rsc_priv *rsc)
	}

	/* check for sequence running status before exiting */
	for (count = MAX_CHECK_LOOPS; count > 0; count--) {
	for (count = (MAX_CHECK_LOOPS / 4); count > 0; count--) {
		seq_status = dss_reg_r(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
				rsc->debug_mode) & BIT(1);
		if (!seq_status) {
			rc = 0;
			break;
		}
		usleep_range(1, 2);

		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
						0x1, rsc->debug_mode);
		usleep_range(3, 4);
		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
						0x0, rsc->debug_mode);
	}

	return rc;