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Commit 890b73af authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge tag 'iio-fixes-for-4.10a' of...

Merge tag 'iio-fixes-for-4.10a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

Jonathan writes:

First round of IIO fixes for the 4.10 cycle.

* 104-quad-8
  - Fix selecting wrong register when the index control register is desired.
  - Fix an off by one error when addressing the input/output control register.
  - Fix inverted logic on the active high / low control
* bmi160
  - Sleep for worst case rather than best case amount of time after cmd
  execution begins.
* max44000
  - typo fix in illuminance_integration_time_available listing.
* st-sensors
  - Fix channel data passing.  This one took a while to get tested on 24bit
  parts. Definitely one for stable asap as the bug broke quite a few parts.
  - lis3lv02 needs a data alignment bit set and the scaling was wrong.
* ti_am335x
  - depend on HAS_DMA
parents 0c744ea4 65e4345c
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+10 −2
Original line number Diff line number Diff line
@@ -353,12 +353,12 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
				[0] = {
					.num = ST_ACCEL_FS_AVL_2G,
					.value = 0x00,
					.gain = IIO_G_TO_M_S_2(1024),
					.gain = IIO_G_TO_M_S_2(1000),
				},
				[1] = {
					.num = ST_ACCEL_FS_AVL_6G,
					.value = 0x01,
					.gain = IIO_G_TO_M_S_2(340),
					.gain = IIO_G_TO_M_S_2(3000),
				},
			},
		},
@@ -366,6 +366,14 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
			.addr = 0x21,
			.mask = 0x40,
		},
		/*
		 * Data Alignment Setting - needs to be set to get
		 * left-justified data like all other sensors.
		 */
		.das = {
			.addr = 0x21,
			.mask = 0x01,
		},
		.drdy_irq = {
			.addr = 0x21,
			.mask_int1 = 0x04,
+1 −1
Original line number Diff line number Diff line
@@ -561,7 +561,7 @@ config TI_ADS8688

config TI_AM335X_ADC
	tristate "TI's AM335X ADC driver"
	depends on MFD_TI_AM335X_TSCADC
	depends on MFD_TI_AM335X_TSCADC && HAS_DMA
	select IIO_BUFFER
	select IIO_KFIFO_BUF
	help
+3 −1
Original line number Diff line number Diff line
@@ -30,7 +30,9 @@ static int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf)

	for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) {
		const struct iio_chan_spec *channel = &indio_dev->channels[i];
		unsigned int bytes_to_read = channel->scan_type.realbits >> 3;
		unsigned int bytes_to_read =
			DIV_ROUND_UP(channel->scan_type.realbits +
				     channel->scan_type.shift, 8);
		unsigned int storage_bytes =
			channel->scan_type.storagebits >> 3;

+12 −1
Original line number Diff line number Diff line
@@ -401,6 +401,15 @@ int st_sensors_init_sensor(struct iio_dev *indio_dev,
			return err;
	}

	/* set DAS */
	if (sdata->sensor_settings->das.addr) {
		err = st_sensors_write_data_with_mask(indio_dev,
					sdata->sensor_settings->das.addr,
					sdata->sensor_settings->das.mask, 1);
		if (err < 0)
			return err;
	}

	if (sdata->int_pin_open_drain) {
		dev_info(&indio_dev->dev,
			 "set interrupt line to open drain mode\n");
@@ -483,8 +492,10 @@ static int st_sensors_read_axis_data(struct iio_dev *indio_dev,
	int err;
	u8 *outdata;
	struct st_sensor_data *sdata = iio_priv(indio_dev);
	unsigned int byte_for_channel = ch->scan_type.realbits >> 3;
	unsigned int byte_for_channel;

	byte_for_channel = DIV_ROUND_UP(ch->scan_type.realbits +
					ch->scan_type.shift, 8);
	outdata = kmalloc(byte_for_channel, GFP_KERNEL);
	if (!outdata)
		return -ENOMEM;
+8 −5
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ static int quad8_write_raw(struct iio_dev *indio_dev,
		ior_cfg = val | priv->preset_enable[chan->channel] << 1;

		/* Load I/O control configuration */
		outb(0x40 | ior_cfg, base_offset);
		outb(0x40 | ior_cfg, base_offset + 1);

		return 0;
	case IIO_CHAN_INFO_SCALE:
@@ -233,7 +233,7 @@ static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
	const struct quad8_iio *const priv = iio_priv(indio_dev);

	return snprintf(buf, PAGE_SIZE, "%u\n",
		priv->preset_enable[chan->channel]);
		!priv->preset_enable[chan->channel]);
}

static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
@@ -241,7 +241,7 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
	size_t len)
{
	struct quad8_iio *const priv = iio_priv(indio_dev);
	const int base_offset = priv->base + 2 * chan->channel;
	const int base_offset = priv->base + 2 * chan->channel + 1;
	bool preset_enable;
	int ret;
	unsigned int ior_cfg;
@@ -250,6 +250,9 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
	if (ret)
		return ret;

	/* Preset enable is active low in Input/Output Control register */
	preset_enable = !preset_enable;

	priv->preset_enable[chan->channel] = preset_enable;

	ior_cfg = priv->ab_enable[chan->channel] |
@@ -362,7 +365,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
	priv->synchronous_mode[chan->channel] = synchronous_mode;

	/* Load Index Control configuration to Index Control Register */
	outb(0x40 | idr_cfg, base_offset);
	outb(0x60 | idr_cfg, base_offset);

	return 0;
}
@@ -444,7 +447,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev,
	priv->index_polarity[chan->channel] = index_polarity;

	/* Load Index Control configuration to Index Control Register */
	outb(0x40 | idr_cfg, base_offset);
	outb(0x60 | idr_cfg, base_offset);

	return 0;
}
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