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Commit 885032b9 authored by Xiao Guangrong's avatar Xiao Guangrong Committed by Paolo Bonzini
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KVM: MMU: retain more available bits on mmio spte 



Let mmio spte only use bit62 and bit63 on upper 32 bits, then bit 52 ~ bit 61
can be used for other purposes

Signed-off-by: default avatarXiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Reviewed-by: default avatarGleb Natapov <gleb@redhat.com>
Reviewed-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 87d41fb4

arch/x86/kvm/vmx.c

+2 −2
Original line number Diff line number Diff line
@@ -4176,10 +4176,10 @@ static void ept_set_mmio_spte_mask(void) 
	/*

	 * EPT Misconfigurations can be generated if the value of bits 2:0

	 * of an EPT paging-structure entry is 110b (write/execute).

	 * Also, magic bits (0xffull << 49) is set to quickly identify mmio

	 * Also, magic bits (0x3ull << 62) is set to quickly identify mmio

	 * spte.

	 */

	kvm_mmu_set_mmio_spte_mask(0xffull << 49 | 0x6ull);

	kvm_mmu_set_mmio_spte_mask((0x3ull << 62) | 0x6ull);

}



/*

arch/x86/kvm/x86.c

+7 −1
Original line number Diff line number Diff line
@@ -5280,7 +5280,13 @@ static void kvm_set_mmio_spte_mask(void) 
	 * Set the reserved bits and the present bit of an paging-structure

	 * entry to generate page fault with PFER.RSV = 1.

	 */

	mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;

	 /* Mask the reserved physical address bits. */

	mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;



	/* Bit 62 is always reserved for 32bit host. */

	mask |= 0x3ull << 62;



	/* Set the present bit. */

	mask |= 1ull;



#ifdef CONFIG_X86_64